Rockwell

Rockwell R6500/1EB3

System on a chip

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CPU cores

1^*

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Processing & platform

CPU cores

1^*

System configuration

Detailed specifications

Specifications · 29 fields

Address bus declaration

12^*

Architecture declaration

8^*

Component type

MCU^*

Technical notes

Backpack emulator, a R6500/1 MCU with external EPROM backpack for prototyping^*

Core design

R6500/1^*

Declared processor cores

1^*

External data bus declaration

8^*

Family

6500/1^*

Floating-point unit declaration

No^*

Scope and conditions

FPU implementation

Integrated or external scope unspecified^*

Maximum or typical clock declaration

1^* MHz

Scope and conditions

Clock type

Maximum or typical; base or boost role unspecified^*

I/O logic compatibility

TTL^*

L1 data cache declaration

No^*

L1 instruction cache declaration

No^*

Unified L1 cache declaration

No^*

L2 cache declaration

No^*

L3 cache declaration

No^*

Manufacturer

Rockwell^*

Military specification declaration

no^*

Multiprocessing declaration

No^*

On-chip peripherals

• Clock generator^*
• counter/timer^*
• edge detection^*

Part number

R6500/1EB3^*

On-chip RAM declaration

64^* B

On-chip ROM declaration

Ext 4KiB (3KiB addressable)^*

Subfamily

R6500/1EB^*

Temperature grade

Commercial^*

Temperature range declaration

0^* – 70^* °C

Scope and conditions

Temperature reference

Unspecified^*

Core supply voltage range

4.75^* – 5.25^* V

Typical core supply voltage

5^* V

I/O supply voltage

5^* V

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