IBM Power6

Processor

CPU cores: 2^*

No matched benchmark results are available for this entry yet.

Processing & platform

CPU cores: 2^*
Hardware threads per core: 2^*

System configuration

Detailed specifications

Specifications · 76 fields

ifu CPU microarchitecture: 2^*
metal layers Manufacturing process: 10^*
lsfu CPU microarchitecture: 2^*
fpfu CPU microarchitecture: 2^*
date: 2007-05-01^*
date: 2007-05-01^*
date: 2007-05-01^*
date: 2007-05-01^*
date: 2007-05-01^*
tfu CPU microarchitecture: 8^*
vdd nom Manufacturing process: 0.8^*
clock: 5,000^*
clock: 4,200^*
clock: 3,500^*
clock: 4,700^*
clock: 3,800^*
max inst decoded CPU microarchitecture: 8^*
hw nthreadspercore: 2^*
hw nthreadspercore: 2^*
hw nthreadspercore: 2^*
hw nthreadspercore: 2^*
hw nthreadspercore: 2^*
iwindow CPU microarchitecture: 48^*
hw ncores: 2^*
hw ncores: 2^*
hw ncores: 2^*
hw ncores: 2^*
hw ncores: 2^*
tdp: 160^*
tdp: 160^*
tdp: 160^*
tdp: 160^*
tdp: 160^*
bus width: 64^*
bus width: 64^*
bus width: 64^*
bus width: 64^*
bus width: 64^*
transistors: 790^*
transistors: 790^*
transistors: 790^*
transistors: 790^*
transistors: 790^*
die size: 341^*
die size: 341^*
die size: 341^*
die size: 341^*
die size: 341^*
vdd low: 0.8^*
vdd low: 0.8^*
vdd low: 0.8^*
vdd low: 0.8^*
vdd low: 0.8^*
vdd high: 1.2^*
vdd high: 1.2^*
vdd high: 1.2^*
vdd high: 1.2^*
vdd high: 1.2^*
out of order CPU microarchitecture: f^*
fanout Process gate-delay observation: 4^*
l1i CPU cache configuration: 64^*
name Processor family: Power6^*
name CPU microarchitecture: Power6^*
delay Process gate-delay observation: 12.6^*
l1d CPU cache configuration: 64^*
l2 shared CPU cache configuration: 4,096^*
vdd Process gate-delay observation: 1.35^*
gate type Process gate-delay observation: inv^*
l2 shared ncores CPU cache configuration: 1^*
year Manufacturing process: 2006^*
fp pipestages CPU microarchitecture: 19^*
technology Manufacturing process: CMOS^*
feature size Manufacturing process: 0.065^*
int pipestages CPU microarchitecture: 14^*
channel length Manufacturing process: 0.035^*
max uop issued per cycle CPU microarchitecture: 5^*

* Provisional data