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AcceleratorsTI TMS320C51
Accelerators
System configuration
Detailed specifications
Specifications ยท 25 fields
- Address bus declaration
- 16*
- Architecture declaration
- 16/32*
- Component type
- DSP*
- Clone designation
- no*
- Declared processor cores
- 1*
- Core designer
- TI*
- External data bus declaration
- 16*
- Family
- TMS320*
- Instruction-set architecture
- TMS320*
- L1 data cache declaration
- No*
- L1 instruction cache declaration
- No*
- Unified L1 cache declaration
- No*
- L2 cache declaration
- No*
- L3 cache declaration
- No*
- Manufacturer
- TI*
- Military specification declaration
- no*
- On-chip peripherals
- PLL*
- sync serial*
- TDM sync serial*
- timer*
- wait-state generator*
- JTAG*
- Part number
- TMS320C51*
- Fabrication technology
- CMOS*
- On-chip RAM declaration
- 2K x 16-bit*
Scope and conditions
- Unit
- Unspecified*
- Maximum RAM declaration
- 192K x 16-bit*
Scope and conditions
- Unit
- Unspecified*
- On-chip ROM declaration
- 8K x 16-bit*
Scope and conditions
- Unit
- Unspecified*
- Subfamily
- TMS320C5x*
- Typical core supply voltage
- 5* V
- I/O supply voltage
- 5* V
0 selected Compare 0
* Provisional data