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Accelerators

T-HEAD

T-Head PPU

Accelerators

Process node: 7 nm^*

Processing & platform

Architecture: PPU^*
Process node: 7 nm^*
Chip foundry: SMIC^*
Compute processor: Zhenwu^*
Device memory type: HBM2e^*
Host interface: PCIe 5.0 x16^*
Declared accelerator TDP: 400 W^*

System configuration

Detailed specifications

Specifications · 9 fields

Architecture: PPU^*
Host interface: PCIe 5.0 x16^*
Chip foundry: SMIC^*
Process node declaration: 7 nm^*
Compute processor: Zhenwu^*
Declared device memory (unit not stated): 96^*
Device memory type: HBM2e^*
2:4 tensor sparsity: No^*
Declared accelerator TDP: 400 W^*

* Provisional data