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Accelerators
KUNLUNXIN

Kunlunxin P800

Accelerators

Process node
7 nm*

Processing & platform

Architecture
XPU-P*
Process node
7 nm*
Compute processor
Kunlun 3*
Device memory type
HBM3*
Host interface
PCIe 5.0 x16*
Declared accelerator TDP
400 W*

System configuration

Detailed specifications

Specifications ยท 9 fields
Architecture
XPU-P*
Host interface
PCIe 5.0 x16*
Reported theoretical FP16 peak
345.0* TFLOPS
Scope and conditions
Arithmetic density
Not stated*
Process node declaration
7 nm*
Compute processor
Kunlun 3*
Declared device memory (unit not stated)
96*
Device memory type
HBM3*
2:4 tensor sparsity
No*
Declared accelerator TDP
400 W*

* Provisional data