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AcceleratorsCambricon MLU290-M5
Accelerators
- Process node
- 7 nm*
Processing & platform
- Architecture
- MLUarch v2*
- Process node
- 7 nm*
- Chip foundry
- TSMC*
- Compute processor
- MLU290*
- Device memory type
- HBM2*
- Declared accelerator TDP
- 350 W*
Memory & storage
- Rated memory bandwidth
- 1,228 GB/s*
System configuration
Detailed specifications
Specifications ยท 10 fields
- Architecture
- MLUarch v2*
- Reported theoretical INT8 peak
- 512.0* TOPS
Scope and conditions
- Arithmetic density
- Not stated*
- Chip foundry
- TSMC*
- Process node declaration
- 7 nm*
- Compute processor
- MLU290*
- Declared device memory (unit not stated)
- 32*
- Rated memory bandwidth
- 1228 GB/s*
- Device memory type
- HBM2*
- 2:4 tensor sparsity
- No*
- Declared accelerator TDP
- 350 W*
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* Provisional data