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GPU

AMD

AMD M96

Graphics processor

No matched benchmark results are available for this entry yet.

Processing & platform

Process node: 55 nm^*
GPU base clock: Reported value 1: 550 MHz^*
Reported value 2: 600 MHz^*
Reported value 3: 450 MHz^*

Power specifications

Thermal design power: Reported value 1: 10 W^*
Reported value 2: 15 W^*
Reported value 3: 35 W^*

System configuration

Detailed specifications

Specifications · 30 fields

model

M96^*

Scope and conditions

source_native_row_context

model: M96^*

model

M96^*

Scope and conditions

source_native_row_context

model: M96^*

model

M96^*

Scope and conditions

source_native_row_context

model: M96^*

core config

320:32:8^*

Scope and conditions

source_native_row_context

model: M96^*

core config

320:32:8^*

Scope and conditions

source_native_row_context

model: M96^*

core config

320:32:8^*

Scope and conditions

source_native_row_context

model: M96^*

tdp watts

10.0^* W

Scope and conditions

source_native_row_context

model: M96^*

tdp watts

15.0^* W

Scope and conditions

source_native_row_context

model: M96^*

tdp watts

35.0^* W

Scope and conditions

source_native_row_context

model: M96^*

manufacturer

AMD^*

Scope and conditions

source_native_row_context

model: M96^*

manufacturer

AMD^*

Scope and conditions

source_native_row_context

model: M96^*

manufacturer

AMD^*

Scope and conditions

source_native_row_context

model: M96^*

launch date

2010-05-05 00:00:00.000000000^*

Scope and conditions

source_native_row_context

model: M96^*

launch date

2010-01-07 00:00:00.000000000^*

Scope and conditions

source_native_row_context

model: M96^*

launch date

2010-05-05 00:00:00.000000000^*

Scope and conditions

source_native_row_context

model: M96^*

code name

RV730^*

Scope and conditions

source_native_row_context

model: M96^*

code name

RV730^*

Scope and conditions

source_native_row_context

model: M96^*

code name

RV730^*

Scope and conditions

source_native_row_context

model: M96^*

fab nm

55^* nm

Scope and conditions

source_native_row_context

model: M96^*

fab nm

55^* nm

Scope and conditions

source_native_row_context

model: M96^*

fab nm

55^* nm

Scope and conditions

source_native_row_context

model: M96^*

bus interface

PCIe ×16 2.0^*

Scope and conditions

source_native_row_context

model: M96^*

bus interface

PCIe ×16 2.0^*

Scope and conditions

source_native_row_context

model: M96^*

bus interface

PCIe ×16 2.0^*

Scope and conditions

source_native_row_context

model: M96^*

core clock mhz

550.0^* MHz

Scope and conditions

source_native_row_context

model: M96^*

core clock mhz

600.0^* MHz

Scope and conditions

source_native_row_context

model: M96^*

core clock mhz

450.0^* MHz

Scope and conditions

source_native_row_context

model: M96^*

memory clock mhz

600.0^* MHz

Scope and conditions

source_native_row_context

model: M96^*

memory clock mhz

800.0^* MHz

Scope and conditions

source_native_row_context

model: M96^*

memory clock mhz

900.0^* MHz

Scope and conditions

source_native_row_context

model: M96^*

* Provisional data