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Zilog

Zilog Z8820PS

System on a chip

CPU cores: 1^*

No matched benchmark results are available for this entry yet.

Processing & platform

CPU cores: 1^*

System configuration

Detailed specifications

Specifications · 32 fields

Architecture declaration

8^*

Scope and conditions

Package: PDIP-48^*

Component type

MCU^*

Scope and conditions

Package: PDIP-48^*

Clone designation

no^*

Scope and conditions

Package: PDIP-48^*

Core design

Super-8^*

Scope and conditions

Package: PDIP-48^*

Declared processor cores

1^*

Scope and conditions

Package: PDIP-48^*

Core designer

Zilog^*

Scope and conditions

Package: PDIP-48^*

Family

Super-8^*

Scope and conditions

Package: PDIP-48^*

Floating-point unit declaration

No^*

Scope and conditions

FPU implementation: Integrated or external scope unspecified^*
Package: PDIP-48^*

Maximum or typical clock declaration

20^* MHz

Scope and conditions

Clock type: Maximum or typical; base or boost role unspecified^*
Package: PDIP-48^*

Instruction set

Super-8^*

Scope and conditions

Package: PDIP-48^*

Instruction-set architecture

Z8^*

Scope and conditions

Package: PDIP-48^*

L1 data cache declaration

No^*

Scope and conditions

Package: PDIP-48^*

L1 instruction cache declaration

No^*

Scope and conditions

Package: PDIP-48^*

Unified L1 cache declaration

No^*

Scope and conditions

Package: PDIP-48^*

L2 cache declaration

No^*

Scope and conditions

Package: PDIP-48^*

L3 cache declaration

No^*

Scope and conditions

Package: PDIP-48^*

Manufacturer

Zilog^*

Scope and conditions

Package: PDIP-48^*

Military specification declaration

no^*

Scope and conditions

Package: PDIP-48^*

Multiprocessing declaration

No^*

Scope and conditions

Package: PDIP-48^*

On-chip peripherals

Clock generator^*
DMAC^*
counter/timers^*
interrupt^*
UART^*

Scope and conditions

Package: PDIP-48^*

Package

PDIP-48^*

Part number

Z8820PS^*

Scope and conditions

Package: PDIP-48^*

On-chip RAM declaration

272^* B

Scope and conditions

Package: PDIP-48^*

Release date declaration

1985^*

Scope and conditions

Date precision: Year^*
Package: PDIP-48^*

On-chip ROM declaration

8^* KiB

Scope and conditions

Package: PDIP-48^*

Socket or package footprint

DIP-48^*

Scope and conditions

Package: PDIP-48^*

Subfamily

Z8820^*

Scope and conditions

Package: PDIP-48^*

Temperature grade

Commercial^*

Scope and conditions

Package: PDIP-48^*

Temperature range declaration

0^* – 70^* °C

Scope and conditions

Temperature reference: Unspecified^*
Package: PDIP-48^*

Core supply voltage range

4.75^* – 5.25^* V

Scope and conditions

Package: PDIP-48^*

Typical core supply voltage

5^* V

Scope and conditions

Package: PDIP-48^*

I/O supply voltage

5^* V

Scope and conditions

Package: PDIP-48^*

* Provisional data