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Zilog

Zilog Z86C0412PEC

System on a chip

CPU cores: 1^*

No matched benchmark results are available for this entry yet.

Processing & platform

CPU cores: 1^*

System configuration

Detailed specifications

Specifications · 34 fields

Architecture declaration

8^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Component type

MCU^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Clone designation

no^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Core design

Z8^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Declared processor cores

1^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Core designer

Zilog^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Family

Z8^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Floating-point unit declaration

No^*

Scope and conditions

FPU implementation: Integrated or external scope unspecified^*
Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Maximum or typical clock declaration

12^* MHz

Scope and conditions

Clock type: Maximum or typical; base or boost role unspecified^*
Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Instruction set

Z8^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Instruction-set architecture

Z8^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

L1 data cache declaration

No^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

L1 instruction cache declaration

No^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Unified L1 cache declaration

No^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

L2 cache declaration

No^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

L3 cache declaration

No^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Power-saving features

STOP mode^*
HALT mode^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Manufacturer

Zilog^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Military specification declaration

no^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Model designation

Z86C04^*

Scope and conditions

Package: Skinny PDIP-18^*

Multiprocessing declaration

No^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

On-chip peripherals

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Package

Skinny PDIP-18^*

Scope and conditions

Model designation: Z86C04^*

Part number

Z86C0412PEC^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Typical power declaration

50^* mW

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Fabrication technology

CMOS^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

On-chip RAM declaration

125^* B

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

On-chip ROM declaration

1^* KiB

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Socket or package footprint

Skinny DIP-18^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Subfamily

Z86C04/C08^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Temperature grade

Industrial^*

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Temperature range declaration

-40^* – 105^* °C

Scope and conditions

Temperature reference: Unspecified^*
Model designation: Z86C04^*
Package: Skinny PDIP-18^*

Core supply voltage range

3^* – 5.5^* V

Scope and conditions

Model designation: Z86C04^*
Package: Skinny PDIP-18^*

I/O supply voltage

Vcc^*

Scope and conditions

Unit: Unspecified^*
Model designation: Z86C04^*
Package: Skinny PDIP-18^*

* Provisional data