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CPU
Unspecified

Xeon LV 2.00 GHz, 2M Cache, 667 MHz FSB

Processor

CPU cores
2*
CPU threads
2*
Thermal design power
31 W*

No matched benchmark results are available for this entry yet.

Processing & platform

CPU cores
2*
CPU threads
2*
Base clock
2 GHz*
Socket / package
PPGA478*
Process node
65 nm*

Cache hierarchy

  • L2*
    Size
    2 MB*
    Level
    L2*
    Scope
    L2 Cache*

Power specifications

Thermal design power
31 W*

System configuration

Detailed specifications

Specifications 1 · 14 fields
cache size
2,048*
tdp
31*
socket
PPGA478*
cores
2*
vertical segment
Server*
status
Discontinued*
max temp
100*
package size
35mm x 35mm*
threads
2*
name
Intel Xeon LV 2.00 GHz, 2M Cache, 667 MHz FSB*
launch date
2006-02-01*
lithography
65*
bus speed
667*
base frequency
2,000*
Specifications 2 · 33 fields
Marketing Status
Discontinued*
Launch Date
Q1'06*
Embedded Options Available
Yes*
Servicing Status
End of Servicing Lifetime*
Sockets Supported
PPGA478*
TCASE
100* °C
Package Size
35mm x 35mm*
Processing Die Size
90 mm2*
# of Processing Die Transistors
151 million*
Product Collection
Legacy Intel® Xeon® Processors*
Intel® Turbo Boost Technology ‡
No*
Intel® Hyper-Threading Technology ‡
No*
Intel® 64 ‡
No*
Instruction Set
32-bit*
Idle States
No*
Enhanced Intel SpeedStep® Technology
Yes*
Intel® Demand Based Switching
No*
Vertical Segment
Server*
Intel® Virtualization Technology (VT-x) ‡
Yes*
Intel® VT-x with Extended Page Tables (EPT) ‡
Yes*
Intel® Trusted Execution Technology ‡
No*
Execute Disable Bit ‡
Yes*
Lithography
65* nm
# of Cores
2*
Processor Base Frequency
2.0* GHz
Cache
2.0* MB
Scope and conditions
source_native_row_context
Cache description
L2 Cache*
Original declaration
2 MB L2 Cache*
Bus Speed
667* MHz
FSB Parity
Yes*
TDP
31* W
VID Voltage Range
1.1125V-1.25V*
Scenario Design Power (SDP)
0* W
Physical Address Extensions
32-bit*
ECC Memory Supported ‡
No*
Specifications 3 · 7 fields
product
Xeon LV 2.00 GHz, 2M Cache, 667 MHz FSB*
status
Discontinued*
releaseDate
2,006*
cores
2*
baseClock
2*
cache
2*
cacheInfo
L2 Cache*

* Provisional data