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CPUX704
Processor
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System configuration
Detailed specifications
Specifications 1 · 5 fields
- Cache hierarchy
- L1 instruction
- 2* KB
- L1 data
- 2* KB
- L1 mapping
- Direct mapped*
- On-die L2
- 32* KB
- L2 associativity
- 8*
- External L3 endpoints
- Minimum
- 512* KB
- Maximum
- 2* MB
- Execution resources
- Issue ceiling
- 3* instructions/cycle
- Units
- Integer ALU*
- FPU*
- Branch unit*
- Processor design
- Designer
- Exponential Technology*
- Developed
- 1,997*
- Architecture
- 32-bit PowerPC*
- Clock options
- 400* – 533* MHz
- Supply and power point
- Supply rails
- 3.6* V
- 2.1* V
- Clock
- 533* MHz
- Power limit
- Less than 85 W*
- Silicon and package
- Transistors
- 2.7* million
- Bipolar transistors
- 0.7* million
- MOS transistors
- 2* million
- Die width
- 15* mm
- Die height
- 10* mm
- Die area
- 150* mm²
- Process
- 0.5* µm
- Technology
- BiCMOS*
- Interconnect levels
- 6*
- Package
- 356-ball BGA*
Specifications 2 · 1 fields
- Manufacturer
- Exponential Technology*
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* Provisional data