VIA Technologies

VIA C7

Processor

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CPU cores

1^*

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Processing & platform

CPU cores

1^*

System configuration

Detailed specifications

Specifications 1 · 18 fields

CPU core options

1^*

Instruction set

x86-16, IA-32^*

Core design 1

Esther (C5J)^*

Designer

Centaur Technology^*

Instruction extensions

MMX, SSE, SSE2, SSE3, PadLock (AES, RNG, SHA, PMM)^*

CPU clock variants: upper endpoint

2.0^* GHz

Front-side bus variants: upper endpoint

800^* MT/s

Front-side bus variants: lower endpoint

400^* MT/s

L1 cache and allocation

64 KiB instruction + 64 KiB data^*

L2 cache and allocation

128 KiB 32-way exclusive^*

Manufacturer 1

VIA Technologies^*

Predecessor

VIA C3^*

Production introduced

May 2005^*

Manufacturing process option 1

90nm^*

CPU clock variants: lower endpoint

1.0^* GHz

Socket or package option 1

Socket 479^*

Socket or package option 2

nanoBGA2 400^*

Successor

VIA Nano^*

Specifications 2 · 3 fields

Instruction set

x86^*

Manufacturer

VIA Technologies^*

Designed by

Centaur Technology^*

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