Not reported

VIA C3

Processor

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CPU cores

1^*

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Processing & platform

CPU cores

1^*

System configuration

Detailed specifications

Specifications 1 · 25 fields

CPU core options

1^*

Instruction set

x86-16 and IA-32^*

Core design 1

Samuel (C5A)^*

Core design 2

Samuel 2 (C5B)^*

Core design 3

Ezra (C5C)^*

Core design 4

Ezra-T (C5N)^*

Core design 5

Nehemiah (C5XL)^*

Core design 6

Nehemiah+ (C5P)^*

Instruction extensions

MMX^*

Instruction extensions 2

3DNow! (Samuel, Ezra)^*

Instruction extensions 3

SSE, PadLock (RNG, Nehemiah; AES Nehemiah+)^*

CPU clock variants: upper endpoint

1.4^* GHz

Front-side bus variants: upper endpoint

200^* MHz

Front-side bus variants: lower endpoint

100^* MHz

L1 cache and allocation

64 KiB instruction + 64 KiB data^*

L2 cache and allocation

64 KiB exclusive^*

Manufacturer 1

VIA^*

Predecessor

Cyrix III^*

Production introduced

2001^*

Manufacturing process option 1

0.13 μm^*

Manufacturing process option 2

0.15 μm^*

CPU clock variants: lower endpoint

500^* MHz

Socket or package option 1

Socket 370^*

Socket or package option 2

EBGA 368^*

Successor

VIA C7^*

Specifications 2 · 1 fields

Instruction set

x86^*

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