Toshiba

Toshiba TMPR4951F-133

Processor

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CPU cores

1^*

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Processing & platform

CPU cores

1^*

System configuration

Detailed specifications

Specifications · 21 fields

Bus clock declaration

66^* MHz

Scope and conditions

Package

QFP-120^*

Architecture declaration

64^*

Scope and conditions

Package

QFP-120^*

Component type

CPU^*

Scope and conditions

Package

QFP-120^*

Core design

TX49^*

Scope and conditions

Package

QFP-120^*

Declared processor cores

1^*

Scope and conditions

Package

QFP-120^*

Core designer

Toshiba^*

Scope and conditions

Package

QFP-120^*

Family

TX49^*

Scope and conditions

Package

QFP-120^*

Maximum or typical clock declaration

133^* MHz

Scope and conditions

Clock type

Maximum or typical; base or boost role unspecified^*

Package

QFP-120^*

Instruction-set architecture

MIPS^*

Scope and conditions

Package

QFP-120^*

L1 data cache declaration

16^* KiB

Scope and conditions

Package

QFP-120^*

L1 data cache organization

4-way set associative^*

Scope and conditions

Package

QFP-120^*

L1 instruction cache declaration

16^* KiB

Scope and conditions

Package

QFP-120^*

L1 instruction cache organization

4-way set associative^*

Scope and conditions

Package

QFP-120^*

L3 cache declaration

No^*

Scope and conditions

Package

QFP-120^*

Manufacturer

Toshiba^*

Scope and conditions

Package

QFP-120^*

On-chip peripherals

• Clock generator^*
• SysAD Bus Interface^*
• JTAG^*

Scope and conditions

Package

QFP-120^*

Package

QFP-120^*

Part number

TMPR4951F-133^*

Scope and conditions

Package

QFP-120^*

Typical power declaration

1.2^* W

Scope and conditions

Package

QFP-120^*

Typical core supply voltage

3.3^* V

Scope and conditions

Package

QFP-120^*

I/O supply voltage

3.3^* V

Scope and conditions

Package

QFP-120^*

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