GeekRadar / The comparison desk

COMPARE.

CPU

Toshiba

Toshiba TC86R4400MC-200

Processor

CPU cores: 1^*

No matched benchmark results are available for this entry yet.

Processing & platform

CPU cores: 1^*
Process node: 350 nm^*

System configuration

Detailed specifications

Specifications · 29 fields

Address bus declaration

64^*

Scope and conditions

Package: Staggered CGPA-447^*

Architecture declaration

64^*

Scope and conditions

Package: Staggered CGPA-447^*

Component type

CPU^*

Scope and conditions

Package: Staggered CGPA-447^*

Clock multiplier

2, 3, 4, 6 or 8^*

Scope and conditions

Package: Staggered CGPA-447^*

Technical notes

Binary compatible with R3000A^*

Scope and conditions

Package: Staggered CGPA-447^*

Declared processor cores

1^*

Scope and conditions

Package: Staggered CGPA-447^*

External data bus declaration

64^*

Scope and conditions

Package: Staggered CGPA-447^*

Die size declaration

184^* mm²

Scope and conditions

Physical region: Whole-chip or component scope unspecified^*
Package: Staggered CGPA-447^*

Family

R4400^*

Scope and conditions

Package: Staggered CGPA-447^*

Floating-point unit declaration

integrated^*

Scope and conditions

FPU implementation: Integrated or external scope unspecified^*
Package: Staggered CGPA-447^*

Maximum or typical clock declaration

200^* MHz

Scope and conditions

Condition: (internal), 100 MHz (external)^*
Clock type: Maximum or typical; base or boost role unspecified^*
Package: Staggered CGPA-447^*

Initial price declaration

23-May-94^*

Scope and conditions

Price scope: Initial price; market unspecified^*
Package: Staggered CGPA-447^*

Instruction-set architecture

MIPS^*

Scope and conditions

Package: Staggered CGPA-447^*

L1 data cache declaration

16^* KiB

Scope and conditions

Package: Staggered CGPA-447^*

L1 data cache organization

direct-mapped^*

Scope and conditions

Package: Staggered CGPA-447^*

L1 instruction cache declaration

16^* KiB

Scope and conditions

Package: Staggered CGPA-447^*

L1 instruction cache organization

direct-mapped^*

Scope and conditions

Package: Staggered CGPA-447^*

L2 cache declaration

Ext 128KiB - 4MiB^*

Scope and conditions

Package: Staggered CGPA-447^*

L3 cache declaration

No^*

Scope and conditions

Package: Staggered CGPA-447^*

Manufacturer

Toshiba^*

Scope and conditions

Package: Staggered CGPA-447^*

On-chip peripherals

Secondary cache controller^*
MMU^*
System control coprocessor^*

Scope and conditions

Package: Staggered CGPA-447^*

Package

Staggered CGPA-447^*

Part number

TC86R4400MC-200^*

Scope and conditions

Package: Staggered CGPA-447^*

Pipeline declaration

8 stages^*

Scope and conditions

Package: Staggered CGPA-447^*

Fabrication node declaration

0.35^* µm

Scope and conditions

Package: Staggered CGPA-447^*

Fabrication technology

CMOS^*

Scope and conditions

Package: Staggered CGPA-447^*

Maximum RAM declaration

64^* GiB

Scope and conditions

Package: Staggered CGPA-447^*

Transistor count declaration

2,300,000^*

Scope and conditions

Package: Staggered CGPA-447^*

Virtual memory declaration

2^* GiB

Scope and conditions

Condition: (user mode); 2.5GiB (supervisor mode); 4GiB (kernel mode)^*
Package: Staggered CGPA-447^*

* Provisional data