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SoC

TI

TI TMS9940MJDL

System on a chip

CPU cores: 1^*

No matched benchmark results are available for this entry yet.

Processing & platform

CPU cores: 1^*

System configuration

Detailed specifications

Specifications · 25 fields

Architecture declaration

16^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Component type

MCU^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Clone designation

no^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Core design

TMS9940^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Declared processor cores

1^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Core designer

TI^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Family

TMS9900^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Maximum or typical clock declaration

4^* MHz

Scope and conditions

Clock type: Maximum or typical; base or boost role unspecified^*
Package: Side-brazed CDIP-40^*

Instruction-set architecture

TMS9900^*

Scope and conditions

Package: Side-brazed CDIP-40^*

L1 data cache declaration

No^*

Scope and conditions

Package: Side-brazed CDIP-40^*

L1 instruction cache declaration

No^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Unified L1 cache declaration

No^*

Scope and conditions

Package: Side-brazed CDIP-40^*

L2 cache declaration

No^*

Scope and conditions

Package: Side-brazed CDIP-40^*

L3 cache declaration

No^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Power-saving features

Power down capable^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Manufacturer

TI^*

Scope and conditions

Package: Side-brazed CDIP-40^*

On-chip peripherals

timer/event counter^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Package

Side-brazed CDIP-40^*

Part number

TMS9940MJDL^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Fabrication technology

NMOS^*

Scope and conditions

Package: Side-brazed CDIP-40^*

On-chip RAM declaration

128^* B

Scope and conditions

Package: Side-brazed CDIP-40^*

On-chip ROM declaration

2^* KiB

Scope and conditions

Package: Side-brazed CDIP-40^*

Socket or package footprint

DIP-40^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Typical core supply voltage

5^* V

Scope and conditions

Package: Side-brazed CDIP-40^*

I/O supply voltage

5^* V

Scope and conditions

Package: Side-brazed CDIP-40^*

* Provisional data