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CPU

TI

TI TMS9900NL

Processor

CPU cores: 1^*

No matched benchmark results are available for this entry yet.

Processing & platform

CPU cores: 1^*

System configuration

Detailed specifications

Specifications · 37 fields

Address bus declaration

15^*

Scope and conditions

Package: (0.9in) PDIP-64^*

Architecture declaration

16^*

Scope and conditions

Package: (0.9in) PDIP-64^*

Component type

CPU^*

Scope and conditions

Package: (0.9in) PDIP-64^*

Clone designation

no^*

Scope and conditions

Package: (0.9in) PDIP-64^*

Core design

TMS9900^*

Scope and conditions

Package: (0.9in) PDIP-64^*

Declared processor cores

1^*

Scope and conditions

Package: (0.9in) PDIP-64^*

Core designer

TI^*

Scope and conditions

Package: (0.9in) PDIP-64^*

External data bus declaration

16^*

Scope and conditions

Package: (0.9in) PDIP-64^*

Family

TMS9900^*

Scope and conditions

Package: (0.9in) PDIP-64^*

Floating-point unit declaration

No^*

Scope and conditions

FPU implementation: Integrated or external scope unspecified^*
Package: (0.9in) PDIP-64^*

Maximum or typical clock declaration

3.3^* MHz

Scope and conditions

Clock type: Maximum or typical; base or boost role unspecified^*
Package: (0.9in) PDIP-64^*

Instruction set

TMS9900^*

Scope and conditions

Package: (0.9in) PDIP-64^*

I/O logic compatibility

TTL^*

Scope and conditions

Package: (0.9in) PDIP-64^*

Instruction-set architecture

TMS9900^*

Scope and conditions

Package: (0.9in) PDIP-64^*

L1 data cache declaration

No^*

Scope and conditions

Package: (0.9in) PDIP-64^*

L1 instruction cache declaration

No^*

Scope and conditions

Package: (0.9in) PDIP-64^*

Unified L1 cache declaration

No^*

Scope and conditions

Package: (0.9in) PDIP-64^*

L2 cache declaration

No^*

Scope and conditions

Package: (0.9in) PDIP-64^*

L3 cache declaration

No^*

Scope and conditions

Package: (0.9in) PDIP-64^*

Manufacturer

TI^*

Scope and conditions

Package: (0.9in) PDIP-64^*

Military specification declaration

no^*

Scope and conditions

Package: (0.9in) PDIP-64^*

On-chip peripherals

Clock generator^*
Interrupt controller^*

Scope and conditions

Package: (0.9in) PDIP-64^*

Package

(0.9in) PDIP-64^*

Part number

TMS9900NL^*

Scope and conditions

Package: (0.9in) PDIP-64^*

Maximum power declaration

0.96^* W

Scope and conditions

Package: (0.9in) PDIP-64^*

Typical power declaration

0.55^* W

Scope and conditions

Package: (0.9in) PDIP-64^*

Fabrication technology

NMOS^*

Scope and conditions

Package: (0.9in) PDIP-64^*

On-chip RAM declaration

No^*

Scope and conditions

Package: (0.9in) PDIP-64^*

Maximum RAM declaration

64^* KiB

Scope and conditions

Package: (0.9in) PDIP-64^*

Socket or package footprint

(0.9in) DIP-64^*

Scope and conditions

Package: (0.9in) PDIP-64^*

Temperature grade

Commercial^*

Scope and conditions

Package: (0.9in) PDIP-64^*

Temperature range declaration

0^* – 70^* °C

Scope and conditions

Temperature reference: Unspecified^*
Package: (0.9in) PDIP-64^*

Core supply voltage range

5^* V

Scope and conditions

Condition: +/- 5%^*
Package: (0.9in) PDIP-64^*

Typical core supply voltage

5^* V

Scope and conditions

Package: (0.9in) PDIP-64^*

I/O supply voltage

12V/5V^*

Scope and conditions

Package: (0.9in) PDIP-64^*

Secondary supply voltage

12^* V

Scope and conditions

Condition: +/- 5%^*
Package: (0.9in) PDIP-64^*

Tertiary supply voltage

-5^* V

Scope and conditions

Condition: +/- 5%^*
Package: (0.9in) PDIP-64^*

* Provisional data