TI

TI TMS1000NLC

System on a chip

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CPU cores

1^*

No matched benchmark results are available for this entry yet.

Processing & platform

CPU cores

1^*

System configuration

Detailed specifications

Specifications · 29 fields

Architecture declaration

4^*

Component type

MCU^*

Clone designation

no^*

Declared processor cores

1^*

Core designer

TI^*

Family

TMS1000^*

Floating-point unit declaration

No^*

Scope and conditions

FPU implementation

Integrated or external scope unspecified^*

Maximum or typical clock declaration

400^* kHz

Scope and conditions

Clock type

Maximum or typical; base or boost role unspecified^*

Minimum clock declaration

100^* kHz

Instruction set

• TMS1000^*

I/O logic compatibility

TTL^*

Instruction-set architecture

TMS1000^*

L1 data cache declaration

No^*

L1 instruction cache declaration

No^*

Unified L1 cache declaration

No^*

L2 cache declaration

No^*

L3 cache declaration

No^*

Manufacturer

TI^*

Military specification declaration

no^*

On-chip peripherals

• Clock generator^*
• PLA^*

Part number

TMS1000NLC^*

Fabrication technology

PMOS^*

On-chip RAM declaration

64 x 4-bit^*

Scope and conditions

Unit

Unspecified^*

On-chip ROM declaration

1^* KiB

Temperature grade

Commercial^*

Temperature range declaration

0^* – 70^* °C

Scope and conditions

Temperature reference

Unspecified^*

Core supply voltage range

14^* – 17.5^* V

Typical core supply voltage

15^* V

I/O supply voltage

15^* V

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