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SoC

Temic

Temic TS83C51RB2xxx-VCER

System on a chip

No matched benchmark results are available for this entry yet.

System configuration

Detailed specifications

Specifications · 29 fields

Architecture declaration

8^*

Component type

MCU^*

Core design

80C51^*

Declared processor cores

n^*

Family

MCS-51 (8051)^*

Features

ONCE mode^*
dual data pointer^*
eXpanded RAM (XRAM)^*

Floating-point unit declaration

No^*

Scope and conditions

FPU implementation: Integrated or external scope unspecified^*

Maximum or typical clock declaration

60^* MHz

Scope and conditions

Clock type: Maximum or typical; base or boost role unspecified^*

Minimum clock declaration

DC^*

Scope and conditions

Unit: Unspecified^*

Instruction set

MCS-51^*

Instruction-set architecture

MCS-51^*

L1 data cache declaration

No^*

L1 instruction cache declaration

No^*

Unified L1 cache declaration

No^*

L2 cache declaration

No^*

L3 cache declaration

No^*

Power-saving features

Idle mode^*
Power Down mode^*
Power-off flag^*

Manufacturer

Temic^*

Military specification declaration

no^*

Multiprocessing declaration

No^*

On-chip peripherals

Clock generator^*
up/down counter/timer^*
interrupt^*
UART^*
WDT^*

Part number

TS83C51RB2xxx-VCER^*

Fabrication technology

CMOS^*

On-chip RAM declaration

512^* B

On-chip ROM declaration

16^* KiB

Subfamily

80C51RB2^*

Core supply voltage range

4.5^* – 5.5^* V

Typical core supply voltage

5^* V

I/O supply voltage

5^* V

* Provisional data