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CPU

Not reported

ST200 family

Processor

No matched benchmark results are available for this entry yet.

System configuration

Detailed specifications

Specifications 1 · 4 fields

Core-variant features

Core
ST210^*
Role
First Lx implementation^*
Core
ST220^*
Additional execute stages
1^*
Maximum latency
3^* cycles
Previous maximum latency
2^* cycles
Core
ST231^*
Register scoreboarding
Yes^*
Multiply operands
First
32^* bit
Second
32^* bit
MMU
Yes^*

VLIW core family

Developers: Hewlett-Packard Laboratories^*
STMicroelectronics^*
Architecture: Lx VLIW^*
Application: Embedded media processing^*
Cores: ST210^*
ST220^*
ST231^*

Lx cluster architecture

Maximum issue per cluster

4^* instructions/cycle

Maximum control instructions per cycle

1^*

Maximum memory instructions per cycle

1^*

Maximum multiply instructions per cycle

2^*

General registers

Count: 64^*
Width: 32^* bit

Branch registers

Count: 8^*
Width: 1^* bit

Division instruction

No^*

Divide-step instruction

Yes^*

Historical toolchain families

HP Lx compiler^*
Open64-based compilers^*
GNU assembler^*
GNU linker^*
GDB^*

Specifications 2 · 1 fields

Processor family or type: very long instruction word^*

* Provisional data