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CPU

Not reported

SpursEngine

Processor

No matched benchmark results are available for this entry yet.

System configuration

Detailed specifications

Specifications · 5 fields

Accelerator implementations

Leadtek WinFast PxVC1100^*
Leadtek HPVC1100^*
Thomson-Canopus Firecoder Blu^*

First-generation silicon

Process

65^* nm

Technology

Bulk CMOS^*

Copper interconnect layers

7^*

Die width

9.98^* mm

Die height

10.31^* mm

Die area

102.89^* mm²

Transistors

239.1^* million

Logic transistors

134^* million

SRAM transistors

104.8^* million

Maximum frequency

1.5^* GHz

Thermal design power limit

Below: 20^* W

Package

624-pin FC-BGA^*

Media coprocessor

Designer: Toshiba^*
Announced: 2007-09-20^*
Role: Media processing coprocessor^*
Processing elements: 4^*
Element type: Synergistic Processing Element^*
Control core width: 32^* bit
Working-memory type: XDR DRAM^*
Hardware codecs: H.264^*
MPEG-2^*

SE1000 reference-board configuration

Host connection: PCI Express x1^*
Memory: 128^* MB
Memory type: XDR DRAM^*
Memory bandwidth: 12.8^* GB/s
Sample shipments: 2008-04^*

First-generation theoretical compute

Peak: 48^* GFLOPS
Per processing element: 12^* GFLOPS
Clock: 1.5^* GHz
Floating-point precision: Not specified^*
Scope: Theoretical peak; not measured application performance^*

* Provisional data