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SoCSignetics SCN8097ACCI48
System on a chip
- CPU cores
- 1*
No matched benchmark results are available for this entry yet.
Processing & platform
- CPU cores
- 1*
System configuration
Detailed specifications
Specifications · 31 fields
- Architecture declaration
- 16*
Scope and conditions
- Package
- CDIP-48*
- Component type
- MCU*
Scope and conditions
- Package
- CDIP-48*
- Clone designation
- Yes, Intel 8097*
Scope and conditions
- Package
- CDIP-48*
- Declared processor cores
- 1*
Scope and conditions
- Package
- CDIP-48*
- Family
- MCS-96*
Scope and conditions
- Package
- CDIP-48*
- Floating-point unit declaration
- No*
Scope and conditions
- FPU implementation
- Integrated or external scope unspecified*
- Package
- CDIP-48*
- Maximum or typical clock declaration
- 12* MHz
Scope and conditions
- Clock type
- Maximum or typical; base or boost role unspecified*
- Package
- CDIP-48*
- Minimum clock declaration
- 6* MHz
Scope and conditions
- Package
- CDIP-48*
- Instruction set
- MCS-96*
Scope and conditions
- Package
- CDIP-48*
- Instruction-set architecture
- MCS-96*
Scope and conditions
- Package
- CDIP-48*
- L1 data cache declaration
- No*
Scope and conditions
- Package
- CDIP-48*
- L1 instruction cache declaration
- No*
Scope and conditions
- Package
- CDIP-48*
- Unified L1 cache declaration
- No*
Scope and conditions
- Package
- CDIP-48*
- L2 cache declaration
- No*
Scope and conditions
- Package
- CDIP-48*
- L3 cache declaration
- No*
Scope and conditions
- Package
- CDIP-48*
- Manufacturer
- Signetics*
Scope and conditions
- Package
- CDIP-48*
- Military specification declaration
- no*
Scope and conditions
- Package
- CDIP-48*
- Multiprocessing declaration
- No*
Scope and conditions
- Package
- CDIP-48*
- On-chip peripherals
- Clock generator*
- interrupt*
- timer/counter*
- serial*
- PWM*
- WDT*
- ADC*
Scope and conditions
- Package
- CDIP-48*
- Package
- CDIP-48*
- Part number
- SCN8097ACCI48*
Scope and conditions
- Package
- CDIP-48*
- On-chip RAM declaration
- 232* B
Scope and conditions
- Package
- CDIP-48*
- Maximum RAM declaration
- 64* KiB
Scope and conditions
- Package
- CDIP-48*
- On-chip ROM declaration
- No*
Scope and conditions
- Package
- CDIP-48*
- Socket or package footprint
- DIP-48*
Scope and conditions
- Package
- CDIP-48*
- Subfamily
- 8097*
Scope and conditions
- Package
- CDIP-48*
- Temperature grade
- Commercial*
Scope and conditions
- Package
- CDIP-48*
- Temperature range declaration
- 0* – 70* °C
Scope and conditions
- Temperature reference
- Unspecified*
- Package
- CDIP-48*
- Core supply voltage range
- 4.5* – 5.5* V
Scope and conditions
- Package
- CDIP-48*
- Typical core supply voltage
- 5* V
Scope and conditions
- Package
- CDIP-48*
- I/O supply voltage
- 5* V
Scope and conditions
- Package
- CDIP-48*
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* Provisional data