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CPU

Rockwell

Rockwell R65C02P2E

Processor

CPU cores: 1^*

No matched benchmark results are available for this entry yet.

Processing & platform

CPU cores: 1^*

System configuration

Detailed specifications

Specifications · 34 fields

Address bus declaration

16^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

Architecture declaration

8^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

Component type

CPU^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

Clone designation

Clone of WDC 65C02^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

Core design

R65C02^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

Declared processor cores

1^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

External data bus declaration

8^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

Family

6502^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

Floating-point unit declaration

No^*

Scope and conditions

FPU implementation: Integrated or external scope unspecified^*
Model designation: R65C02^*
Package: PDIP-40^*

Maximum or typical clock declaration

2^* MHz

Scope and conditions

Clock type: Maximum or typical; base or boost role unspecified^*
Model designation: R65C02^*
Package: PDIP-40^*

Instruction set

6502^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

Instruction-set architecture

6502^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

L1 data cache declaration

No^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

L1 instruction cache declaration

No^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

Unified L1 cache declaration

No^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

L2 cache declaration

No^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

L3 cache declaration

No^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

Manufacturer

Rockwell^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

Military specification declaration

no^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

Model designation

R65C02^*

Scope and conditions

Package: PDIP-40^*

On-chip peripherals

Clock generator^*
interrupt logic^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

Package

PDIP-40^*

Scope and conditions

Model designation: R65C02^*

Part number

R65C02P2E^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

Typical power declaration

40^* mW

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

Fabrication technology

CMOS^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

Maximum RAM declaration

64^* KiB

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

On-chip ROM declaration

No^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

Socket or package footprint

DIP-40^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

Subfamily

R65C00^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

Temperature grade

Industrial^*

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

Temperature range declaration

-40^* – 85^* °C

Scope and conditions

Temperature reference: Unspecified^*
Model designation: R65C02^*
Package: PDIP-40^*

Core supply voltage range

4.75^* – 5.25^* V

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

Typical core supply voltage

5^* V

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

I/O supply voltage

5^* V

Scope and conditions

Model designation: R65C02^*
Package: PDIP-40^*

* Provisional data