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SoCRockwell R6518P
System on a chip
- CPU cores
- 1*
No matched benchmark results are available for this entry yet.
Processing & platform
- CPU cores
- 1*
System configuration
Detailed specifications
Specifications · 38 fields
- Additional instructions
- Set Memory Bit (SMB)*
- Resent Memory Bit (RMB)*
- Branch on Bit Set (BBS)*
- Branch on Bit Reset (BBR)*
- Decimal*
- and binary modes*
Scope and conditions
- Package
- PDIP-40*
- Address bus declaration
- 14*
Scope and conditions
- Package
- PDIP-40*
- Architecture declaration
- 8*
Scope and conditions
- Package
- PDIP-40*
- Bus details
- Address bus A4-A11 shared with Data bus*
Scope and conditions
- Package
- PDIP-40*
- Component type
- MCU*
Scope and conditions
- Package
- PDIP-40*
- Clone designation
- no*
Scope and conditions
- Package
- PDIP-40*
- Core design
- R6518*
Scope and conditions
- Package
- PDIP-40*
- Declared processor cores
- 1*
Scope and conditions
- Package
- PDIP-40*
- Core designer
- Rockwell*
Scope and conditions
- Package
- PDIP-40*
- External data bus declaration
- 8*
Scope and conditions
- Package
- PDIP-40*
- Family
- 6500/1*
Scope and conditions
- Package
- PDIP-40*
- Floating-point unit declaration
- No*
Scope and conditions
- FPU implementation
- Integrated or external scope unspecified*
- Package
- PDIP-40*
- Maximum or typical clock declaration
- 1* MHz
Scope and conditions
- Clock type
- Maximum or typical; base or boost role unspecified*
- Package
- PDIP-40*
- Instruction set
- 6502*
Scope and conditions
- Package
- PDIP-40*
- I/O logic compatibility
- TTL*
Scope and conditions
- Package
- PDIP-40*
- Instruction-set architecture
- 6502*
Scope and conditions
- Package
- PDIP-40*
- L1 data cache declaration
- No*
Scope and conditions
- Package
- PDIP-40*
- L1 instruction cache declaration
- No*
Scope and conditions
- Package
- PDIP-40*
- Unified L1 cache declaration
- No*
Scope and conditions
- Package
- PDIP-40*
- L2 cache declaration
- No*
Scope and conditions
- Package
- PDIP-40*
- L3 cache declaration
- No*
Scope and conditions
- Package
- PDIP-40*
- Manufacturer
- Rockwell*
Scope and conditions
- Package
- PDIP-40*
- Military specification declaration
- no*
Scope and conditions
- Package
- PDIP-40*
- Multiprocessing declaration
- No*
Scope and conditions
- Package
- PDIP-40*
- On-chip peripherals
- Clock generator*
- counter/timer*
- edge detection*
- serial*
Scope and conditions
- Package
- PDIP-40*
- Package
- PDIP-40*
- Part number
- R6518P*
Scope and conditions
- Package
- PDIP-40*
- Fabrication technology
- NMOS-3*
Scope and conditions
- Package
- PDIP-40*
- On-chip RAM declaration
- 192* B
Scope and conditions
- Package
- PDIP-40*
- Maximum RAM declaration
- 16* KiB
Scope and conditions
- Package
- PDIP-40*
- On-chip ROM declaration
- No*
Scope and conditions
- Package
- PDIP-40*
- Socket or package footprint
- DIP-40*
Scope and conditions
- Package
- PDIP-40*
- Subfamily
- R6518*
Scope and conditions
- Package
- PDIP-40*
- Temperature grade
- Commercial*
Scope and conditions
- Package
- PDIP-40*
- Temperature range declaration
- 0* – 70* °C
Scope and conditions
- Temperature reference
- Unspecified*
- Package
- PDIP-40*
- Core supply voltage range
- 4.75* – 5.25* V
Scope and conditions
- Package
- PDIP-40*
- Typical core supply voltage
- 5* V
Scope and conditions
- Package
- PDIP-40*
- I/O supply voltage
- 5* V
Scope and conditions
- Package
- PDIP-40*
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* Provisional data