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CPU

Unspecified

Pentium 4 Supporting HT Technology, 3.20E GHz, 1M Cache, 800 MHz FSB

Processor

CPU cores: 1^*
CPU threads: 2^*
Thermal design power: 103 W^*

No matched benchmark results are available for this entry yet.

Processing & platform

CPU cores: 1^*
CPU threads: 2^*
Base clock: 3.2 GHz^*
Process node: 90 nm^*

Cache hierarchy

L2^*
Size
1 MB^*
Level
L2^*
Scope
L2 Cache^*

Power specifications

Thermal design power: 103 W^*

System configuration

Detailed specifications

Specifications 1 · 13 fields

cache size: 1,024^*
tdp: 103^*
cores: 1^*
vertical segment: Desktop^*
status: Discontinued^*
max temp: 73.5^*
package size: 35mm x 35mm^*
threads: 2^*
name: Intel Pentium 4 supporting HT Technology 3.20E GHz, 1M Cache, 800 MHz FSB^*
launch date: 2004-02-01^*
lithography: 90^*
bus speed: 800^*
base frequency: 3,200^*

Specifications 2 · 28 fields

Intel® Trusted Execution Technology ‡

No^*

Execute Disable Bit ‡

No^*

# of Cores

1^*

Processor Base Frequency

3.2^* GHz

Cache

1.0^* MB

Scope and conditions

source_native_row_context

Cache description: L2 Cache^*
Original declaration: 1 MB L2 Cache^*

Bus Speed

800^* MHz

FSB Parity

No^*

TDP

103^* W

VID Voltage Range

1.250V-1.400V^*

Marketing Status

Discontinued^*

Launch Date

Q1'04^*

Embedded Options Available

No^*

Servicing Status

End of Servicing Updates^*

Product Collection

Legacy Intel® Pentium® Processor^*

Vertical Segment

Desktop^*

Package Size

35mm x 35mm^*

TCASE

73.5^* °C

Processing Die Size

112 mm2^*

# of Processing Die Transistors

125 million^*

Lithography

90^* nm

Intel® Hyper-Threading Technology ‡

Yes^*

Instruction Set

32-bit^*

Intel® Turbo Boost Technology ‡

No^*

Intel® Virtualization Technology (VT-x) ‡

No^*

Intel® 64 ‡

No^*

Idle States

No^*

Enhanced Intel SpeedStep® Technology

No^*

Intel® Demand Based Switching

No^*

Specifications 3 · 7 fields

product: Pentium 4 Supporting HT Technology, 3.20E GHz, 1M Cache, 800 MHz FSB^*
status: Discontinued^*
releaseDate: 2,004^*
cores: 1^*
baseClock: 3.2^*
cache: 1^*
cacheInfo: L2 Cache^*

* Provisional data