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CPU

Unspecified

Pentium 4 2.50 GHz, 512K Cache, 400 MHz FSB

Processor

CPU cores: 1^*
CPU threads: 1^*
Thermal design power: 61 W^*

No matched benchmark results are available for this entry yet.

Processing & platform

CPU cores: 1^*
CPU threads: 1^*
Base clock: 2.5 GHz^*
Socket / package: PPGA478^*
Process node: 130 nm^*

Cache hierarchy

L2^*
Size
512 KB^*
Level
L2^*
Scope
L2 Cache^*

Power specifications

Thermal design power: 61 W^*

System configuration

Detailed specifications

Specifications 1 · 14 fields

cache size: 512^*
tdp: 61^*
socket: PPGA478^*
cores: 1^*
vertical segment: Desktop^*
status: Discontinued^*
max temp: 72^*
package size: 35mm x 35mm^*
threads: 1^*
name: Intel Pentium 4 2.50 GHz, 512K Cache, 400 MHz FSB^*
launch date: 2002-02-01^*
lithography: 130^*
bus speed: 400^*
base frequency: 2,500^*

Specifications 2 · 29 fields

Intel® Trusted Execution Technology ‡

No^*

Execute Disable Bit ‡

No^*

# of Cores

1^*

Processor Base Frequency

2.5^* GHz

Cache

512.0^* KB

Scope and conditions

source_native_row_context

Cache description: L2 Cache^*
Original declaration: 512 KB L2 Cache^*

Bus Speed

400^* MHz

FSB Parity

No^*

TDP

61^* W

VID Voltage Range

1.350V-1.430V^*

Marketing Status

Discontinued^*

Launch Date

Q1'02^*

Embedded Options Available

No^*

Servicing Status

End of Servicing Updates^*

Product Collection

Legacy Intel® Pentium® Processor^*

Vertical Segment

Desktop^*

Sockets Supported

PPGA478^*

Package Size

35mm x 35mm^*

TCASE

72^* °C

Processing Die Size

131 mm2^*

# of Processing Die Transistors

55 million^*

Lithography

130^* nm

Intel® Hyper-Threading Technology ‡

No^*

Instruction Set

32-bit^*

Intel® Turbo Boost Technology ‡

No^*

Intel® Virtualization Technology (VT-x) ‡

No^*

Intel® 64 ‡

No^*

Idle States

No^*

Enhanced Intel SpeedStep® Technology

No^*

Intel® Demand Based Switching

No^*

Specifications 3 · 7 fields

product: Pentium 4 2.50 GHz, 512K Cache, 400 MHz FSB^*
status: Discontinued^*
releaseDate: 2,002^*
cores: 1^*
baseClock: 2.5^*
cache: 0.5^*
cacheInfo: L2 Cache^*

* Provisional data