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COMPARE.
CPUNEC D30700RS-200
Processor
- CPU cores
- 1*
No matched benchmark results are available for this entry yet.
Processing & platform
- CPU cores
- 1*
- Process node
- 350 nm*
System configuration
Detailed specifications
Specifications · 35 fields
- Alternative designation 1
- VR10000*
Scope and conditions
- Package
- CLGA-599*
- Alternative designation 2
- uPD30700RS-200*
Scope and conditions
- Package
- CLGA-599*
- Alternative designation 3
- μPD30700RS-200*
Scope and conditions
- Package
- CLGA-599*
- Architecture declaration
- 64*
Scope and conditions
- Package
- CLGA-599*
- Component type
- CPU*
Scope and conditions
- Package
- CLGA-599*
- Clone designation
- no*
Scope and conditions
- Package
- CLGA-599*
- Declared processor cores
- 1*
Scope and conditions
- Package
- CLGA-599*
- Die size declaration
- 306* mm²
Scope and conditions
- Physical region
- Whole-chip or component scope unspecified*
- Package
- CLGA-599*
- Family
- R10000*
Scope and conditions
- Package
- CLGA-599*
- Floating-point unit declaration
- integrated*
Scope and conditions
- FPU implementation
- Integrated or external scope unspecified*
- Package
- CLGA-599*
- Maximum or typical clock declaration
- 200* MHz
Scope and conditions
- Clock type
- Maximum or typical; base or boost role unspecified*
- Package
- CLGA-599*
- Instruction set
- R10000*
Scope and conditions
- Package
- CLGA-599*
- Instruction-set architecture
- MIPS*
Scope and conditions
- Package
- CLGA-599*
- L1 data cache declaration
- 32* KiB
Scope and conditions
- Package
- CLGA-599*
- L1 data cache organization
- 2-way set associative write-back*
Scope and conditions
- Package
- CLGA-599*
- L1 instruction cache declaration
- 32* KiB
Scope and conditions
- Package
- CLGA-599*
- L1 instruction cache organization
- 2-way set associative*
Scope and conditions
- Package
- CLGA-599*
- Unified L1 cache declaration
- No*
Scope and conditions
- Package
- CLGA-599*
- L2 cache declaration
- ext. 512KiB to 16MiB*
Scope and conditions
- Package
- CLGA-599*
- L2 cache organization
- 128-bit 2-way set associative write-back*
Scope and conditions
- Package
- CLGA-599*
- Manufacturer
- NEC*
Scope and conditions
- Package
- CLGA-599*
- Military specification declaration
- no*
Scope and conditions
- Package
- CLGA-599*
- Multiprocessing declaration
- up to 4 processors*
Scope and conditions
- Package
- CLGA-599*
- On-chip peripherals
- L2 cache controller*
Scope and conditions
- Package
- CLGA-599*
- Package
- CLGA-599*
- Package dimensions
- 4.75 x 4.75 cm^2*
Scope and conditions
- Package
- CLGA-599*
- Part number
- D30700RS-200*
Scope and conditions
- Package
- CLGA-599*
- Maximum power declaration
- 30* W
Scope and conditions
- Package
- CLGA-599*
- Fabrication node declaration
- 0.35* µm
Scope and conditions
- Package
- CLGA-599*
- Fabrication technology
- CMOS*
Scope and conditions
- Package
- CLGA-599*
- Temperature grade
- Commercial*
Scope and conditions
- Package
- CLGA-599*
- Temperature range declaration
- 20* – 85* °C
Scope and conditions
- Temperature reference
- Unspecified*
- Package
- CLGA-599*
- Transistor count declaration
- 6,700,000*
Scope and conditions
- Package
- CLGA-599*
- Core supply voltage range
- 3.3* V
Scope and conditions
- Condition
- ± 5%*
- Package
- CLGA-599*
- Typical core supply voltage
- 3.3* V
Scope and conditions
- Package
- CLGA-599*
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* Provisional data