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Motorola

Motorola MC6805T2P

System on a chip

CPU cores
1*

No matched benchmark results are available for this entry yet.

Processing & platform

CPU cores
1*

System configuration

Detailed specifications

Specifications · 25 fields
Architecture declaration
8*
Scope and conditions
Package
PDIP-40*
Component type
MCU*
Scope and conditions
Package
PDIP-40*
Core design
6805*
Scope and conditions
Package
PDIP-40*
Declared processor cores
1*
Scope and conditions
Package
PDIP-40*
Core designer
Motorola*
Scope and conditions
Package
PDIP-40*
Family
6805*
Scope and conditions
Package
PDIP-40*
Maximum or typical clock declaration
1* MHz
Scope and conditions
Clock type
Maximum or typical; base or boost role unspecified*
Package
PDIP-40*
Minimum clock declaration
0.1* MHz
Scope and conditions
Package
PDIP-40*
L1 data cache declaration
No*
Scope and conditions
Package
PDIP-40*
L1 instruction cache declaration
No*
Scope and conditions
Package
PDIP-40*
Unified L1 cache declaration
No*
Scope and conditions
Package
PDIP-40*
L2 cache declaration
No*
Scope and conditions
Package
PDIP-40*
L3 cache declaration
No*
Scope and conditions
Package
PDIP-40*
Manufacturer
Motorola*
Scope and conditions
Package
PDIP-40*
Package
PDIP-40*
Part number
MC6805T2P*
Scope and conditions
Package
PDIP-40*
Typical power declaration
400* mW
Scope and conditions
Package
PDIP-40*
Fabrication technology
HMOS*
Scope and conditions
Package
PDIP-40*
On-chip RAM declaration
64* B
Scope and conditions
Package
PDIP-40*
On-chip ROM declaration
2* KiB
Scope and conditions
Package
PDIP-40*
Socket or package footprint
DIP-40*
Scope and conditions
Package
PDIP-40*
Temperature range declaration
0* – 70* °C
Scope and conditions
Temperature reference
Unspecified*
Package
PDIP-40*
Core supply voltage range
4.75* – 5.75* V
Scope and conditions
Package
PDIP-40*
Typical core supply voltage
5.25* V
Scope and conditions
Package
PDIP-40*
I/O supply voltage
5.25* V
Scope and conditions
Package
PDIP-40*

* Provisional data