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CPU

Motorola

Motorola MC68008L8

Processor

CPU cores: 1^*

No matched benchmark results are available for this entry yet.

Processing & platform

CPU cores: 1^*

System configuration

Detailed specifications

Specifications · 25 fields

Address bus declaration

24^*

Scope and conditions

Package: sIde-brazed CDIP-48^*

Architecture declaration

8/16/32^*

Scope and conditions

Package: sIde-brazed CDIP-48^*

Component type

CPU^*

Scope and conditions

Package: sIde-brazed CDIP-48^*

Core design

68000^*

Scope and conditions

Package: sIde-brazed CDIP-48^*

Declared processor cores

1^*

Scope and conditions

Package: sIde-brazed CDIP-48^*

Core designer

Motorola^*

Scope and conditions

Package: sIde-brazed CDIP-48^*

External data bus declaration

16^*

Scope and conditions

Package: sIde-brazed CDIP-48^*

Family

68000^*

Scope and conditions

Package: sIde-brazed CDIP-48^*

Floating-point unit declaration

No^*

Scope and conditions

FPU implementation: Integrated or external scope unspecified^*
Package: sIde-brazed CDIP-48^*

Maximum or typical clock declaration

8^* MHz

Scope and conditions

Clock type: Maximum or typical; base or boost role unspecified^*
Package: sIde-brazed CDIP-48^*

Minimum clock declaration

4^* MHz

Scope and conditions

Package: sIde-brazed CDIP-48^*

Instruction-set architecture

68000^*

Scope and conditions

Package: sIde-brazed CDIP-48^*

L1 data cache declaration

No^*

Scope and conditions

Package: sIde-brazed CDIP-48^*

L1 instruction cache declaration

No^*

Scope and conditions

Package: sIde-brazed CDIP-48^*

Unified L1 cache declaration

No^*

Scope and conditions

Package: sIde-brazed CDIP-48^*

L2 cache declaration

No^*

Scope and conditions

Package: sIde-brazed CDIP-48^*

L3 cache declaration

No^*

Scope and conditions

Package: sIde-brazed CDIP-48^*

Manufacturer

Motorola^*

Scope and conditions

Package: sIde-brazed CDIP-48^*

Package

sIde-brazed CDIP-48^*

Part number

MC68008L8^*

Scope and conditions

Package: sIde-brazed CDIP-48^*

Maximum RAM declaration

16^* MiB

Scope and conditions

Package: sIde-brazed CDIP-48^*

Socket or package footprint

DIP-48^*

Scope and conditions

Package: sIde-brazed CDIP-48^*

Core supply voltage range

4.75^* – 5.25^* V

Scope and conditions

Package: sIde-brazed CDIP-48^*

Typical core supply voltage

5^* V

Scope and conditions

Package: sIde-brazed CDIP-48^*

I/O supply voltage

5^* V

Scope and conditions

Package: sIde-brazed CDIP-48^*

* Provisional data

Processing & platform

System configuration

Detailed specifications

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