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CPU

Mostek

Mostek MK68000P-8B

Processor

CPU cores: 1^*

No matched benchmark results are available for this entry yet.

Processing & platform

CPU cores: 1^*

System configuration

Detailed specifications

Specifications · 26 fields

Address bus declaration

20^*

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

Architecture declaration

32^*

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

Bus bandwidth declaration

1^*

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

Component type

CPU^*

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

Core design

68000^*

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

Declared processor cores

1^*

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

External data bus declaration

16^*

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

Family

68000^*

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

Maximum or typical clock declaration

8^* MHz

Scope and conditions

Clock type: Maximum or typical; base or boost role unspecified^*
Package: Side-brazed (0.9) CDIP-64^*

Minimum clock declaration

2^* MHz

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

L1 data cache declaration

No^*

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

L1 instruction cache declaration

No^*

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

Unified L1 cache declaration

No^*

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

L2 cache declaration

No^*

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

L3 cache declaration

No^*

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

Manufacturer

Mostek^*

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

Package

Side-brazed (0.9) CDIP-64^*

Package dimensions

8.13 x 2.26 cm^2^*

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

Part number

MK68000P-8B^*

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

Maximum power declaration

1.5^* W

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

Maximum RAM declaration

16^* MiB

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

Socket or package footprint

0.9 DIP-64^*

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

Temperature range declaration

0^* – 70^* °C

Scope and conditions

Temperature reference: Unspecified^*
Package: Side-brazed (0.9) CDIP-64^*

Core supply voltage range

4.75^* – 5.25^* V

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

Typical core supply voltage

5^* V

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

I/O supply voltage

5^* V

Scope and conditions

Package: Side-brazed (0.9) CDIP-64^*

* Provisional data