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Matsushita

Matsushita MN188161

System on a chip

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System configuration

Detailed specifications

Specifications · 18 fields

Architecture declaration

8^*

Scope and conditions

Package: DIP-64^*

Component type

MCU^*

Scope and conditions

Package: DIP-64^*

Floating-point unit declaration

No^*

Scope and conditions

FPU implementation: Integrated or external scope unspecified^*
Package: DIP-64^*

Maximum or typical clock declaration

8^* MHz

Scope and conditions

Clock type: Maximum or typical; base or boost role unspecified^*
Package: DIP-64^*

Minimum clock declaration

32.768^* kHz

Scope and conditions

Package: DIP-64^*

L1 data cache declaration

No^*

Scope and conditions

Package: DIP-64^*

L1 instruction cache declaration

No^*

Scope and conditions

Package: DIP-64^*

Unified L1 cache declaration

No^*

Scope and conditions

Package: DIP-64^*

L2 cache declaration

No^*

Scope and conditions

Package: DIP-64^*

L3 cache declaration

No^*

Scope and conditions

Package: DIP-64^*

Manufacturer

Matsushita^*

Scope and conditions

Package: DIP-64^*

Package

DIP-64^*

Part number

MN188161^*

Scope and conditions

Package: DIP-64^*

Fabrication technology

CMOS^*

Scope and conditions

Package: DIP-64^*

On-chip RAM declaration

448^* B

Scope and conditions

Package: DIP-64^*

Maximum RAM declaration

64^* KiB

Scope and conditions

Package: DIP-64^*

On-chip ROM declaration

16^* KiB

Scope and conditions

Package: DIP-64^*

Typical core supply voltage

5^* V

Scope and conditions

Package: DIP-64^*

* Provisional data