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CPU

Intersil

Intersil IM6100AMDL

Processor

CPU cores: 1^*

No matched benchmark results are available for this entry yet.

Processing & platform

CPU cores: 1^*

System configuration

Detailed specifications

Specifications · 23 fields

Architecture declaration

12^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Component type

CPU^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Declared processor cores

1^*

Scope and conditions

Package: Side-brazed CDIP-40^*

External data bus declaration

12^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Family

6100^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Floating-point unit declaration

No^*

Scope and conditions

FPU implementation: Integrated or external scope unspecified^*
Package: Side-brazed CDIP-40^*

Maximum or typical clock declaration

8^* MHz

Scope and conditions

Clock type: Maximum or typical; base or boost role unspecified^*
Package: Side-brazed CDIP-40^*

L1 data cache declaration

No^*

Scope and conditions

Package: Side-brazed CDIP-40^*

L1 instruction cache declaration

No^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Unified L1 cache declaration

No^*

Scope and conditions

Package: Side-brazed CDIP-40^*

L2 cache declaration

No^*

Scope and conditions

Package: Side-brazed CDIP-40^*

L3 cache declaration

No^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Manufacturer

Intersil^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Package

Side-brazed CDIP-40^*

Part number

IM6100AMDL^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Maximum power declaration

0.1^* W

Scope and conditions

Package: Side-brazed CDIP-40^*

Fabrication technology

CMOS^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Maximum RAM declaration

6^* KiB

Scope and conditions

Package: Side-brazed CDIP-40^*

Socket or package footprint

DIP-40^*

Scope and conditions

Package: Side-brazed CDIP-40^*

Temperature range declaration

-55^* – 125^* °C

Scope and conditions

Temperature reference: Unspecified^*
Package: Side-brazed CDIP-40^*

Core supply voltage range

9^* – 11^* V

Scope and conditions

Package: Side-brazed CDIP-40^*

Typical core supply voltage

10^* V

Scope and conditions

Package: Side-brazed CDIP-40^*

I/O supply voltage

10^* V

Scope and conditions

Package: Side-brazed CDIP-40^*

* Provisional data