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CPU
Intel

Intel Xeon Processor ULV 1.66 GHz, 2M Cache, 667 MHz FSB

Processor

CPU cores
2*
Thermal design power
15 W*

No matched benchmark results are available for this entry yet.

Processing & platform

CPU cores
2*
Base clock
1.66 GHz*
Process node
65 nm*

Cache hierarchy

  • L2*
    Size
    2 MB*
    Level
    L2*
    Scope
    L2 Cache*

Power specifications

Thermal design power
15 W*

System configuration

Detailed specifications

Specifications 1 · 32 fields
BornOnDate
Q1'06*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
Bus
667 MHz*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
Cache
2 MB L2 Cache*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
ClockSpeed
1.66 GHz*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
CodeNameText
Products formerly Sossaman*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
CoreCount
2*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
CoreVoltage
1.0V-1.2125V*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
CpuId
29750*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
CpuName
Intel® Xeon® Processor ULV 1.66 GHz, 2M Cache, 667 MHz FSB*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
DemandBasedSwitching
No*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
DieSize
90 mm2*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
EM64
No*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
Embedded
Yes*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
ExecuteDisable
Yes*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
ExtendedPageTables
Yes*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
FSBParity
Yes*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
HaltState
Yes*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
HyperThreading
No*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
InstructionSet
32-bit*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
Lithography
65 nm*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
MarketSegment
Server*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
MaxTDP
15 W*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
PackageSize
35mm x 35mm*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
ProductGroup
Legacy Intel® Xeon® Processors*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
ServicingStatus
End of Servicing Lifetime*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
SpeedstepTechnology
Yes*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
StatusCodeText
Discontinued*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
TBTVersion
No*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
TCase
100°C*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
TransistorCount
151 million*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
TXT
No*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
VTX
Yes*
Scope and conditions
native_context
member
intel-cpus.csv*
row
2,439*
Specifications 2 · 29 fields
Marketing Status
Discontinued*
Launch Date
Q1'06*
Embedded Options Available
Yes*
Servicing Status
End of Servicing Lifetime*
TCASE
100* °C
Package Size
35mm x 35mm*
Processing Die Size
90 mm2*
# of Processing Die Transistors
151 million*
Product Collection
Legacy Intel® Xeon® Processors*
Intel® Turbo Boost Technology ‡
No*
Intel® Hyper-Threading Technology ‡
No*
Intel® 64 ‡
No*
Instruction Set
32-bit*
Idle States
Yes*
Enhanced Intel SpeedStep® Technology
Yes*
Intel® Demand Based Switching
No*
Vertical Segment
Server*
Intel® Virtualization Technology (VT-x) ‡
Yes*
Intel® VT-x with Extended Page Tables (EPT) ‡
Yes*
Intel® Trusted Execution Technology ‡
No*
Execute Disable Bit ‡
Yes*
Lithography
65* nm
# of Cores
2*
Processor Base Frequency
1.66* GHz
Cache
2.0* MB
Scope and conditions
source_native_row_context
Cache description
L2 Cache*
Original declaration
2 MB L2 Cache*
Bus Speed
667* MHz
FSB Parity
Yes*
TDP
15* W
VID Voltage Range
1.0V-1.2125V*

* Provisional data