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CPU

Intel

Intel Xeon 7041

Processor Released Nov 1, 2005

CPU cores: 2^*
CPU threads: 4^*
Thermal design power: 165 W

No matched benchmark results are available for this entry yet.

Processing & platform

CPU cores: 2^*
CPU threads: 4^*
Base clock: 3 GHz
Socket / package: Socket 604
Process node: 90 nm^*
Hardware threads per core: 2^*

Compatible sockets

Socket 604

Power specifications

Thermal design power: 165 W

System configuration

Detailed specifications

Specifications 1 · 19 fields

Product Collection: Legacy Intel® Xeon® Processors^*
Processor Base Frequency: 3^* GHz
Cache: 4 MB L2^*
Bus Speed: 800 MHz FSB^*
TDP: 165^* W
Embedded Options Available: No^*
Vertical Segment: Server^*
Processor Number: 7041^*
T: 76°C^*
Intel Hyper Threading Technology: Yes^*
Intel Virtualization Technology VTx: Yes^*
Intel 64: Yes^*
Status: End of Life^*
Instruction Set: 64-bit^*
Idle States: Yes^*
Execute Disable Bit: Yes^*
Lithography: 90^* nm
Recommended Customer Price: $3,157.00^*
nb of Cores: 2^*

Specifications 2 · 21 fields

metal layers Manufacturing process: 7^*
metal Manufacturing process: copper^*
model: 7041^*
clock: 3,000^*
hw nthreadspercore: 2^*
hw ncores: 2^*
tdp: 165^*
transistors: 230^*
die size: 206^*
vdd low: 1.2625^*
vdd high: 1.4125^*
l1i CPU cache configuration: 12^*
name Processor code name: Paxville^*
name Processor family: Xeon^*
l1d CPU cache configuration: 16^*
l2 shared CPU cache configuration: 4,096^*
name Manufacturing process: P1262^*
year Manufacturing process: 2003^*
technology Manufacturing process: CMOS^*
feature size Manufacturing process: 0.09^*
channel length Manufacturing process: 0.053^*

Specifications 3 · 14 fields

cache size: 4,096^*
tdp: 165^*
socket: PPGA604^*
cores: 2^*
vertical segment: Server^*
status: Discontinued^*
max temp: 76^*
package size: 53.3mm x 53.3mm^*
threads: 4^*
name: Intel Xeon 7041^*
processor number: 7041^*
lithography: 90^*
bus speed: 800^*
base frequency: 3,000^*

Specifications 4 · 6 fields

product: Xeon 7041^*
status: Discontinued^*
cores: 2^*
baseClock: 3^*
cache: 4^*
cacheInfo: L2 Cache^*

* Provisional data