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CPU
Intel

Intel TS80C188XL

Processor

CPU cores
1*

No matched benchmark results are available for this entry yet.

Processing & platform

CPU cores
1*

System configuration

Detailed specifications

Specifications · 34 fields
Bus clock declaration
10* MHz
Scope and conditions
Package
PQFP-80*
Additional instructions
none*
Scope and conditions
Package
PQFP-80*
Address bus declaration
20*
Scope and conditions
Package
PQFP-80*
Architecture declaration
16*
Scope and conditions
Package
PQFP-80*
Component type
CPU*
Scope and conditions
Package
PQFP-80*
Clock multiplier
1*
Scope and conditions
Package
PQFP-80*
Declared processor cores
1*
Scope and conditions
Package
PQFP-80*
Core designer
Intel*
Scope and conditions
Package
PQFP-80*
External data bus declaration
8*
Scope and conditions
Package
PQFP-80*
Family
188*
Scope and conditions
Package
PQFP-80*
Features
  • Extended temperature range*
Scope and conditions
Package
PQFP-80*
Maximum or typical clock declaration
10* MHz
Scope and conditions
Clock type
Maximum or typical; base or boost role unspecified*
Package
PQFP-80*
Instruction set
  • 186*
Scope and conditions
Package
PQFP-80*
Instruction-set extensions
none*
Scope and conditions
Package
PQFP-80*
Instruction-set architecture
X86-16*
Scope and conditions
Package
PQFP-80*
L1 data cache declaration
No*
Scope and conditions
Package
PQFP-80*
L1 instruction cache declaration
No*
Scope and conditions
Package
PQFP-80*
Unified L1 cache declaration
No*
Scope and conditions
Package
PQFP-80*
L2 cache declaration
No*
Scope and conditions
Package
PQFP-80*
L3 cache declaration
No*
Scope and conditions
Package
PQFP-80*
Power-saving features
  • Power-save mode*
Scope and conditions
Package
PQFP-80*
Manufacturer
Intel*
Scope and conditions
Package
PQFP-80*
Military specification declaration
no*
Scope and conditions
Package
PQFP-80*
On-chip peripherals
  • Clock generator*
  • two independent DMA channels*
  • interrupt controller*
  • three 16-bit timers*
  • wait-state generator*
  • local bus controller*
  • programmable memory and peripheral chip-select logic*
  • DRAM refresh controller*
Scope and conditions
Package
PQFP-80*
Package
PQFP-80*
Part number
TS80C188XL*
Scope and conditions
Package
PQFP-80*
Fabrication technology
CHMOS*
Scope and conditions
Package
PQFP-80*
Maximum RAM declaration
1* MiB
Scope and conditions
Package
PQFP-80*
Release date declaration
1991*
Scope and conditions
Date precision
Year*
Package
PQFP-80*
Subfamily
80C186XL*
Scope and conditions
Package
PQFP-80*
Temperature range declaration
-40* – 85* °C
Scope and conditions
Temperature reference
Unspecified*
Package
PQFP-80*
Typical core supply voltage
5* V
Scope and conditions
Package
PQFP-80*
I/O supply voltage
5* V
Scope and conditions
Package
PQFP-80*
Virtual memory declaration
1* GiB
Scope and conditions
Package
PQFP-80*

* Provisional data