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CPU
Intel

Intel Itanium

Processor

CPU cores
1*

No matched benchmark results are available for this entry yet.

Processing & platform

CPU cores
1*
Hardware threads per core
1*

System configuration

Detailed specifications

Specifications ยท 97 fields
ifu CPU microarchitecture
2*
metal layers Manufacturing process
6*
lsfu CPU microarchitecture
4*
metal Manufacturing process
aluminum*
fpfu CPU microarchitecture
2*
date
2001-05-01*
tfu CPU microarchitecture
11*
clock
800*
clock
1,400*
clock
1,000*
clock
1,600*
clock
900*
clock
1,300*
clock
1,500*
clock
1,660*
clock
733*
max inst decoded CPU microarchitecture
6*
hw nthreadspercore
1*
hw nthreadspercore
1*
hw nthreadspercore
1*
hw nthreadspercore
1*
hw nthreadspercore
1*
hw nthreadspercore
1*
hw nthreadspercore
1*
hw nthreadspercore
1*
hw nthreadspercore
1*
iwindow CPU microarchitecture
6*
hw ncores
1*
hw ncores
1*
hw ncores
1*
hw ncores
1*
hw ncores
1*
hw ncores
1*
hw ncores
1*
hw ncores
1*
hw ncores
1*
if queue CPU microarchitecture
24*
bht size CPU microarchitecture
20,000*
tdp
122*
tdp
90*
tdp
91*
tdp
122*
tdp
100*
tdp
97*
tdp
107*
tdp
130*
btb size CPU microarchitecture
64*
bus width
64*
arch int reg CPU microarchitecture
6,400*
transistors
410*
transistors
410*
transistors
410*
transistors
592*
transistors
410*
transistors
25*
transistors
410*
transistors
592*
arch fp reg CPU microarchitecture
128*
die size
300*
die size
374*
die size
432*
die size
374*
die size
374*
die size
432*
die size
374*
die size
374*
vdd low
1.65*
vdd high
1.65*
fanout Process gate-delay observation
1*
fanout Process gate-delay observation
1*
l1i CPU cache configuration
16*
name CPU microarchitecture
Merced*
name Processor code name
Madison*
name Processor family
Itanium*
name Processor code name
Merced*
delay Process gate-delay observation
13*
delay Process gate-delay observation
10.75*
isa CPU microarchitecture
IA-64*
l1d CPU cache configuration
16*
l2 shared CPU cache configuration
9,216*
l2 shared CPU cache configuration
1,536*
l2 shared CPU cache configuration
4,096*
l2 shared CPU cache configuration
3,072*
l2 shared CPU cache configuration
96*
l2 shared CPU cache configuration
6,144*
name Manufacturing process
P858*
vdd Process gate-delay observation
1.5*
vdd Process gate-delay observation
1.3*
gate type Process gate-delay observation
inv*
gate type Process gate-delay observation
inv*
year Manufacturing process
1999*
fp pipestages CPU microarchitecture
8*
technology Manufacturing process
CMOS*
feature size Manufacturing process
0.18*
int pipestages CPU microarchitecture
8*
channel length Manufacturing process
0.13*
max uop issued per cycle CPU microarchitecture
11*

* Provisional data