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CPU
Intel

Intel Celeron D 355

Processor

CPU cores
1
CPU threads
1*
Thermal design power
84 W

No matched benchmark results are available for this entry yet.

Processing & platform

CPU cores
1
CPU threads
1*
Base clock
3.33 GHz*
L2 cache
0.25 MB
Socket / package
LGA 775
Process node
90 nm*
Hardware threads per core
1*

Cache hierarchy

  • L2 / total
    Level
    L2
    Scope
    total
    Size
    0.25 MB
  • L2*
    Size
    256 KB*
    Level
    L2*
    Scope
    L2 Cache*

Compatible sockets

  • LGA 775

Power specifications

Thermal design power
84 W

System configuration

Detailed specifications

Specifications 1 · 12 fields
model
355*
clock
3,330*
hw nthreadspercore
1*
hw ncores
1*
tdp
84*
transistors
125*
die size
112*
vdd low
1.25*
vdd high
1.4*
name Processor family
Celeron D*
name Processor code name
Prescott*
l2 shared CPU cache configuration
256*
Specifications 2 · 15 fields
cache size
256*
tdp
84*
socket
PLGA775*
cores
1*
vertical segment
Desktop*
status
Discontinued*
max temp
67.7*
package size
37.5mm x 37.5mm*
threads
1*
name
Intel Celeron D 355*
processor number
355*
launch date
2005-11-01*
lithography
90*
bus speed
533*
base frequency
3,330*
Specifications 3 · 33 fields
Marketing Status
Discontinued*
Launch Date
Q4'05*
Embedded Options Available
No*
Servicing Status
End of Servicing Lifetime*
Sockets Supported
PLGA775*
TCASE
67.7* °C
Package Size
37.5mm x 37.5mm*
Processing Die Size
112 mm2*
# of Processing Die Transistors
125 million*
Product Collection
Legacy Intel® Celeron® Processor*
Intel® Turbo Boost Technology ‡
No*
Intel® Hyper-Threading Technology ‡
No*
Intel® 64 ‡
Yes*
Instruction Set
64-bit*
Idle States
Yes*
Enhanced Intel SpeedStep® Technology
No*
Intel® Demand Based Switching
No*
Vertical Segment
Desktop*
Intel® Virtualization Technology (VT-x) ‡
No*
Processor Number
355*
Intel® Trusted Execution Technology ‡
No*
Execute Disable Bit ‡
Yes*
Intel® AES New Instructions
No*
Lithography
90* nm
# of Cores
1*
Processor Base Frequency
3.33* GHz
Cache
256.0* KB
Scope and conditions
source_native_row_context
Cache description
L2 Cache*
Original declaration
256 KB L2 Cache*
Bus Speed
533* MHz
FSB Parity
No*
TDP
84* W
VID Voltage Range
1.250V-1.400V*
Physical Address Extensions
32-bit*
ECC Memory Supported ‡
No*
Specifications 4 · 7 fields
product
Celeron D 355*
status
Discontinued*
releaseDate
2,005*
cores
1*
baseClock
3.33*
cache
0.25*
cacheInfo
L2 Cache*

* Provisional data