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CPU

Intel

Intel A80186

Processor

CPU cores: 1^*

No matched benchmark results are available for this entry yet.

Processing & platform

CPU cores: 1^*
Process node: 1,500 nm^*

System configuration

Detailed specifications

Specifications · 40 fields

Bus clock declaration

8^* MHz

Scope and conditions

Package: CPGA-68^*

Additional instructions

none^*

Scope and conditions

Package: CPGA-68^*

Address bus declaration

20^*

Scope and conditions

Package: CPGA-68^*

Architecture declaration

16^*

Scope and conditions

Package: CPGA-68^*

Bus bandwidth declaration

4MiB/s^*

Scope and conditions

Package: CPGA-68^*

Component type

CPU^*

Scope and conditions

Package: CPGA-68^*

Clock multiplier

1^*

Scope and conditions

Package: CPGA-68^*

Core design

80186^*

Scope and conditions

Package: CPGA-68^*

Declared processor cores

1^*

Scope and conditions

Package: CPGA-68^*

Core designer

Intel^*

Scope and conditions

Package: CPGA-68^*

External data bus declaration

16^*

Scope and conditions

Package: CPGA-68^*

Family

186^*

Scope and conditions

Package: CPGA-68^*

Floating-point unit declaration

Ext 8087^*

Scope and conditions

FPU implementation: Integrated or external scope unspecified^*
Package: CPGA-68^*

Maximum or typical clock declaration

8^* MHz

Scope and conditions

Clock type: Maximum or typical; base or boost role unspecified^*
Package: CPGA-68^*

Instruction set

186^*

Scope and conditions

Package: CPGA-68^*

Instruction-set extensions

none^*

Scope and conditions

Package: CPGA-68^*

Instruction-set architecture

X86-16^*

Scope and conditions

Package: CPGA-68^*

L1 data cache declaration

No^*

Scope and conditions

Package: CPGA-68^*

L1 instruction cache declaration

No^*

Scope and conditions

Package: CPGA-68^*

Unified L1 cache declaration

No^*

Scope and conditions

Package: CPGA-68^*

L2 cache declaration

No^*

Scope and conditions

Package: CPGA-68^*

L3 cache declaration

No^*

Scope and conditions

Package: CPGA-68^*

Manufacturer

Intel^*

Scope and conditions

Package: CPGA-68^*

Military specification declaration

no^*

Scope and conditions

Package: CPGA-68^*

On-chip peripherals

Clock generator^*
two independent DMA channels^*
interrupt controller^*
three 16-bit timers^*
wait-state generator^*
local bus controller^*
programmable memory and peripheral chip-select logic^*

Scope and conditions

Package: CPGA-68^*

Package

CPGA-68^*

Package dimensions

29.2 x 29.2 x 7 mm^3^*

Scope and conditions

Package: CPGA-68^*

Part number

A80186^*

Scope and conditions

Package: CPGA-68^*

Maximum power declaration

3.03^* W

Scope and conditions

Package: CPGA-68^*

Fabrication node declaration

1.5^* µm

Scope and conditions

Package: CPGA-68^*

Fabrication technology

NMOS^*

Scope and conditions

Package: CPGA-68^*

Maximum RAM declaration

1^* MiB

Scope and conditions

Package: CPGA-68^*

Release date declaration

1982^*

Scope and conditions

Date precision: Year^*
Package: CPGA-68^*

Subfamily

80186^*

Scope and conditions

Package: CPGA-68^*

Temperature range declaration

0^* – 70^* °C

Scope and conditions

Temperature reference: Unspecified^*
Package: CPGA-68^*

Transistor count declaration

55,000^*

Scope and conditions

Package: CPGA-68^*

Core supply voltage range

4.5^* – 5.5^* V

Scope and conditions

Package: CPGA-68^*

Typical core supply voltage

5^* V

Scope and conditions

Package: CPGA-68^*

I/O supply voltage

5^* V

Scope and conditions

Package: CPGA-68^*

Virtual memory declaration

1^* GiB

Scope and conditions

Package: CPGA-68^*

* Provisional data

Processing & platform

System configuration

Detailed specifications

Related hardware