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CPUIBM PowerPC 604
Processor
- CPU cores
- 1*
No matched benchmark results are available for this entry yet.
Processing & platform
- CPU cores
- 1*
- Hardware threads per core
- 1*
System configuration
Detailed specifications
Specifications ยท 63 fields
- ifu CPU microarchitecture
- 3*
- metal layers Manufacturing process
- 4*
- lsfu CPU microarchitecture
- 1*
- fpfu CPU microarchitecture
- 1*
- date
- 1994-12-01*
- tfu CPU microarchitecture
- 6*
- vdd nom Manufacturing process
- 2.5*
- clock
- 100*
- clock
- 133*
- clock
- 112*
- clock
- 120*
- max inst decoded CPU microarchitecture
- 4*
- rob size CPU microarchitecture
- 16*
- hw nthreadspercore
- 1*
- hw nthreadspercore
- 1*
- hw nthreadspercore
- 1*
- hw nthreadspercore
- 1*
- iwindow CPU microarchitecture
- 10*
- hw ncores
- 1*
- hw ncores
- 1*
- hw ncores
- 1*
- hw ncores
- 1*
- if queue CPU microarchitecture
- 8*
- bht size CPU microarchitecture
- 512*
- tdp
- 14*
- btb size CPU microarchitecture
- 64*
- bus width
- 32*
- bus width
- 32*
- bus width
- 32*
- bus width
- 32*
- arch int reg CPU microarchitecture
- 32*
- transistors
- 3.6*
- transistors
- 3.6*
- transistors
- 3.6*
- transistors
- 3.6*
- arch fp reg CPU microarchitecture
- 32*
- die size
- 196*
- die size
- 196*
- die size
- 196*
- die size
- 196*
- vdd low
- 2.5*
- vdd low
- 2.5*
- vdd low
- 2.5*
- vdd low
- 2.5*
- vdd high
- 2.5*
- vdd high
- 2.5*
- vdd high
- 2.5*
- vdd high
- 2.5*
- out of order CPU microarchitecture
- t*
- l1i CPU cache configuration
- 16*
- name Processor family
- PowerPC 604*
- name CPU microarchitecture
- PowerPC 604*
- l1d CPU cache configuration
- 16*
- l2 shared CPU cache configuration
- 1,024*
- l2 shared CPU cache configuration
- 256*
- l2 shared CPU cache configuration
- 512*
- year Manufacturing process
- 1994*
- fp pipestages CPU microarchitecture
- 8*
- technology Manufacturing process
- CMOS*
- feature size Manufacturing process
- 0.35*
- int pipestages CPU microarchitecture
- 6*
- channel length Manufacturing process
- 0.35*
- max uop issued per cycle CPU microarchitecture
- 4*
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* Provisional data