EPYC 9255

Processor

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Processing & platform

Specifications · 36 fields

name: EPYC 9255^*
Release Date: Oct 10th, 2024^*
Part#: 100-000000694^*
Frequency: 3.25^* GHz
Turbo Clock: up to 4.8 GHz^*
I/O Process Size: 6^* nm
Base Clock: 100^* MHz
CXL: Gen 2.0^*
Multiplier: 32.5x^*
Multiplier Unlocked: No^*
2DPC Rated Speed: 4,400^* MT/s
Codename: Turin^*
Socket: AMD Socket SP5^*
Generation: EPYC (Zen 5 (Turin))^*
Memory Support: DDR5^*
ECC Memory: Yes^*
# of Cores: 24^*
# of Threads: 48^*
SMP # CPUs: 2^*
Cache L1: 80 KB (per core)^*
Cache L2: 1 MB (per core)^*
Features: MMX, SSE, SSE2, SSE3, SSSE3, SSE4A, SSE4.1, SSE4.2, AES, AVX, AVX2, AVX-512, AVX-VNNI, VNNI/VEX, BMI1, BMI2, BFloat16, SHA, F16C, FMA3, AMD64, EVP, AMD-V, SMAP, SMEP, X2AVIC, AIBRS, SEV-SNP, 5-level NPT, SMT, Precision Boost 2^*
Foundry: TSMC^*
Rated Speed: 6,000^* MT/s
Memory Bus: Twelve-channel^*
Memory Bandwidth: 576^* GB/s
Launch Price: $2,495^*
PCI-Express: Gen 5, 128 Lanes (CPU only)^*
Process Size: 4^* nm
Cache L3: 128 MB (shared)^*
Configurable TDP: 200-240 W^*
Transistors: 33,260 million^*
Die Size: 4x 70.6 mm²^*
Package: FC-LGA6096^*
Market: Server/Workstation^*
Production Status: Active^*

* Provisional data