DEC Alpha 21164 | GeekRadar

Processing & platform

CPU cores: 1^*
Process node: 500 nm^*
Hardware threads per core: 1^*

System configuration

Detailed specifications

Specifications 1 · 90 fields

ifu CPU microarchitecture: 2^*
metal layers Manufacturing process: 4^*
lsfu CPU microarchitecture: 2^*
fpfu CPU microarchitecture: 2^*
date: 1994-09-07^*
date: 1994-09-07^*
date: 1994-09-07^*
date: 1994-09-07^*
date: 1994-09-07^*
date: 1994-09-07^*
tfu CPU microarchitecture: 4^*
vdd nom Manufacturing process: 3.3^*
clock: 350^*
clock: 300^*
clock: 250^*
clock: 333^*
clock: 291^*
clock: 266^*
max inst decoded CPU microarchitecture: 4^*
hw nthreadspercore: 1^*
hw nthreadspercore: 1^*
hw nthreadspercore: 1^*
hw nthreadspercore: 1^*
hw nthreadspercore: 1^*
hw nthreadspercore: 1^*
hw ncores: 1^*
hw ncores: 1^*
hw ncores: 1^*
hw ncores: 1^*
hw ncores: 1^*
hw ncores: 1^*
bht size CPU microarchitecture: 4,096^*
tdp: 56^*
tdp: 51^*
tdp: 56^*
tdp: 51^*
tdp: 46^*
tdp: 46^*
bus width: 64^*
bus width: 64^*
bus width: 64^*
bus width: 64^*
bus width: 64^*
bus width: 64^*
arch int reg CPU microarchitecture: 32^*
transistors: 9.3^*
transistors: 9.3^*
transistors: 9.3^*
transistors: 9.3^*
transistors: 9.3^*
transistors: 9.3^*
arch fp reg CPU microarchitecture: 32^*
die size: 299^*
die size: 299^*
die size: 299^*
die size: 299^*
die size: 299^*
die size: 299^*
total arch reg CPU microarchitecture: 32^*
vdd low: 3.3^*
vdd low: 3.3^*
vdd low: 3.3^*
vdd low: 3.3^*
vdd low: 3.3^*
vdd low: 3.3^*
vdd high: 3.3^*
vdd high: 3.3^*
vdd high: 3.3^*
vdd high: 3.3^*
vdd high: 3.3^*
vdd high: 3.3^*
out of order CPU microarchitecture: f^*
memory bw CPU microarchitecture: 1,200^*
l1i CPU cache configuration: 8^*
name Processor code name: EV5^*
name Processor family: Alpha 21164^*
name CPU microarchitecture: EV5^*
isa CPU microarchitecture: Alpha^*
l1d CPU cache configuration: 8^*
l2 shared CPU cache configuration: 96^*
name Manufacturing process: CMOS-5^*
year Manufacturing process: 1993^*
fp pipestages CPU microarchitecture: 9^*
l3 shared CPU cache configuration: 4,096^*
l3 shared CPU cache configuration: 2,048^*
technology Manufacturing process: CMOS^*
feature size Manufacturing process: 0.5^*
int pipestages CPU microarchitecture: 7^*
channel length Manufacturing process: 0.5^*
max uop issued per cycle CPU microarchitecture: 4^*

Specifications 2 · 24 fields

Alternative designation 1

21164-BA 300^*

Scope and conditions

Part number: 21-40658-17^*
Model designation: 21164^*
Package: CPGA-499^*

Architecture declaration

64^*

Scope and conditions

Part number: 21-40658-17^*
Model designation: 21164^*
Package: CPGA-499^*

Component type

CPU^*

Scope and conditions

Part number: 21-40658-17^*
Model designation: 21164^*
Package: CPGA-499^*

Core design

EV5^*

Scope and conditions

Part number: 21-40658-17^*
Model designation: 21164^*
Package: CPGA-499^*

Declared processor cores

1^*

Scope and conditions

Part number: 21-40658-17^*
Model designation: 21164^*
Package: CPGA-499^*

Family

Alpha^*

Scope and conditions

Part number: 21-40658-17^*
Model designation: 21164^*
Package: CPGA-499^*

Floating-point unit declaration

Integrated^*

Scope and conditions

FPU implementation: Integrated or external scope unspecified^*
Part number: 21-40658-17^*
Model designation: 21164^*
Package: CPGA-499^*

Maximum or typical clock declaration

300^* MHz

Scope and conditions

Clock type: Maximum or typical; base or boost role unspecified^*
Part number: 21-40658-17^*
Model designation: 21164^*
Package: CPGA-499^*

L1 data cache declaration

8^* KiB

Scope and conditions

Part number: 21-40658-17^*
Model designation: 21164^*
Package: CPGA-499^*

L1 instruction cache declaration

8^* KiB

Scope and conditions

Part number: 21-40658-17^*
Model designation: 21164^*
Package: CPGA-499^*

Unified L1 cache declaration

No^*

Scope and conditions

Part number: 21-40658-17^*
Model designation: 21164^*
Package: CPGA-499^*

L2 cache declaration

96^* KiB

Scope and conditions

Part number: 21-40658-17^*
Model designation: 21164^*
Package: CPGA-499^*

L2 cache organization

3-Way set associative^*

Scope and conditions

Part number: 21-40658-17^*
Model designation: 21164^*
Package: CPGA-499^*

L3 cache declaration

No^*

Scope and conditions

Part number: 21-40658-17^*
Model designation: 21164^*
Package: CPGA-499^*

Manufacturer

DEC^*

Scope and conditions

Part number: 21-40658-17^*
Model designation: 21164^*
Package: CPGA-499^*

Microarchitecture

Alpha AXP^*

Scope and conditions

Part number: 21-40658-17^*
Model designation: 21164^*
Package: CPGA-499^*

Model designation

21164^*

Scope and conditions

Part number: 21-40658-17^*
Package: CPGA-499^*

Package

CPGA-499^*

Scope and conditions

Part number: 21-40658-17^*
Model designation: 21164^*

Part number

21-40658-17^*

Scope and conditions

Part number: 21-40658-17^*
Model designation: 21164^*
Package: CPGA-499^*

Fabrication node declaration

0.5^* µm

Scope and conditions

Part number: 21-40658-17^*
Model designation: 21164^*
Package: CPGA-499^*

Fabrication technology

CMOS^*

Scope and conditions

Part number: 21-40658-17^*
Model designation: 21164^*
Package: CPGA-499^*

Release date declaration

September 1994^*

Scope and conditions

Part number: 21-40658-17^*
Model designation: 21164^*
Package: CPGA-499^*

Transistor count declaration

9,700,000^*

Scope and conditions

Part number: 21-40658-17^*
Model designation: 21164^*
Package: CPGA-499^*

I/O supply voltage

3.3^* V

Scope and conditions

Part number: 21-40658-17^*
Model designation: 21164^*
Package: CPGA-499^*

Devices using this component

DEC Alpha 21164

Related hardware

DEC Alpha 21164

DEC 21-40658-17
Part number for this model^*