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CPU

Sony Group

Bionz

Processor

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System configuration

Detailed specifications

Specifications 1 · 5 fields

BIONZ X configuration

Introduced: 2,013^*
ISP family: CXD4236^*
Controller: CXD90027GF^*
Controller CPU: Quad-core ARM Cortex-A5^*
Image-processing width: 16^* bit
Raw-output width: 14^* bit
Reported processing ceiling: 20^* frames/s
Scope: Processor capabilities; camera throughput depends on implementation^*

Early BIONZ implementation

First named camera: Sony DSLR-A700^*
Year: 2,007^*
Processor: MegaChips MA07170^*
Architecture: 32-bit RISC^*
CPU core: MIPS R3000^*
Other MA07170 cameras: Sony DSLR-A200^*
Sony DSLR-A300^*
Sony DSLR-A350^*
Dual-MA07170 cameras: Sony DSLR-A850^*
Sony DSLR-A900^*

Image-processing family

Designer: Sony^*
Role: Camera image processing^*
Controller SoC pattern: CXD900xx^*
Image-signal processor pattern: CXD4xxx^*

BIONZ XR and XR2 variants

Variant
BIONZ XR^*
Introduced
2,020^*
First named camera
Sony α7S III^*
Examples
- Sony α1^*
- Sony α1 II^*
- Sony FX6^*
- Sony FX3^*
- Sony α7 IV^*
- Sony A7C II^*
- Sony α6700^*
Variant
BIONZ XR2^*
Introduced
2,025^*
First named camera
Sony α7 V^*
Integrated capability
AI processing unit^*

Named Sony ISP/controller combinations

ISP
CXD4115^*
Example cameras
- DSLR-A450^*
- DSLR-A500^*
- DSLR-A550^*
Controller
CXD9974GG^*
ISP
CXD4115-1^*
Example cameras
- DSLR-A560^*
- DSLR-A580^*
- SLT-A33^*
- SLT-A35^*
- SLT-A55^*
- NEX-C3^*
- NEX-VG10^*
Controller
CXD90016GF^*
ISP
CXD4132^*
Example cameras
- NEX-5R^*
- NEX-5T^*
- NEX-6^*
- NEX-7^*

Specifications 2 · 2 fields

Manufacturer: Sony Group^*
Processor type: image processor^*

* Provisional data