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CPU

AMD

AMD SB80C188-16

Processor

CPU cores: 1^*

No matched benchmark results are available for this entry yet.

Processing & platform

CPU cores: 1^*

System configuration

Detailed specifications

Specifications · 34 fields

Bus clock declaration

16^* MHz

Scope and conditions

Package: TQFP-80^*

Address bus declaration

20^*

Scope and conditions

Package: TQFP-80^*

Architecture declaration

16^*

Scope and conditions

Package: TQFP-80^*

Component type

CPU^*

Scope and conditions

Package: TQFP-80^*

Clock multiplier

1^*

Scope and conditions

Package: TQFP-80^*

Technical notes

Pin-compatible with NMOS 80186 (with the exception of 8087 operations), Object-code compatible with 8086 and 8088^*

Scope and conditions

Package: TQFP-80^*

Declared processor cores

1^*

Scope and conditions

Package: TQFP-80^*

External data bus declaration

8^*

Scope and conditions

Package: TQFP-80^*

Family

188^*

Scope and conditions

Package: TQFP-80^*

Floating-point unit declaration

No^*

Scope and conditions

FPU implementation: Integrated or external scope unspecified^*
Package: TQFP-80^*

Maximum or typical clock declaration

16^* MHz

Scope and conditions

Clock type: Maximum or typical; base or boost role unspecified^*
Package: TQFP-80^*

Instruction set

186^*

Scope and conditions

Package: TQFP-80^*

Instruction-set architecture

x86^*

Scope and conditions

Package: TQFP-80^*

L1 data cache declaration

No^*

Scope and conditions

Package: TQFP-80^*

L1 instruction cache declaration

No^*

Scope and conditions

Package: TQFP-80^*

Unified L1 cache declaration

No^*

Scope and conditions

Package: TQFP-80^*

L2 cache declaration

No^*

Scope and conditions

Package: TQFP-80^*

L3 cache declaration

No^*

Scope and conditions

Package: TQFP-80^*

Power-saving features

Power-save mode^*

Scope and conditions

Package: TQFP-80^*

Manufacturer

AMD^*

Scope and conditions

Package: TQFP-80^*

Military specification declaration

no^*

Scope and conditions

Package: TQFP-80^*

On-chip peripherals

Clock generator^*
Two independent high-speed DMA channels^*
Programmable interrupt controller^*
Three programmable 16-bit timers^*
Programmable memory and peripheral chip-select logic^*
Programmable wait state generator^*
Local bus controller^*
DRAM refresh control unit^*

Scope and conditions

Package: TQFP-80^*

Package

TQFP-80^*

Package dimensions

12 x 12 mm^2^*

Scope and conditions

Package: TQFP-80^*

Part number

SB80C188-16^*

Scope and conditions

Package: TQFP-80^*

Maximum power declaration

0.44^* W

Scope and conditions

Package: TQFP-80^*

Fabrication technology

CMOS^*

Scope and conditions

Package: TQFP-80^*

Maximum RAM declaration

1^* MiB

Scope and conditions

Package: TQFP-80^*

RAM type

DRAM^*

Scope and conditions

Package: TQFP-80^*

Temperature grade

Commercial^*

Scope and conditions

Package: TQFP-80^*

Temperature range declaration

0^* – 70^* °C

Scope and conditions

Temperature reference: Unspecified^*
Package: TQFP-80^*

Core supply voltage range

4.5^* – 5.5^* V

Scope and conditions

Package: TQFP-80^*

Typical core supply voltage

5^* V

Scope and conditions

Package: TQFP-80^*

I/O supply voltage

5^* V

Scope and conditions

Package: TQFP-80^*

* Provisional data